Journal of the Korean Institute of Telematics and Electronics S (전자공학회논문지S)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A VLSI implementation of image processor for facsimile and digital copier

팩시밀리 및 디지털 복사기를 위한 고속 영상 처리기의 VLSI구현

  • 박창대 (부산대학교 전자공학과) ;
  • 정영훈 (부산대학교 전자공학과) ;
  • 김형수 (부산대학교 전자공학과) ;
  • 김진수 (부산대학교 전자공학과) ;
  • 권오준 (삼성전자 데이터 통신사업부) ;
  • 홍기상 (포항공과대학교 전기전자공학과) ;
  • 장동구 (삼성전자 멀티미디어 연구소) ;
  • 박기용 (삼성전자 멀티미디어 연구소) ;
  • 김윤수 (삼성전자 멀티미디어 연구소)
  • Published : 1998.01.01
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Abstract

A new image processor is implemented for high-speed digital copiers and facsimiles. The imgage processor performs CCD and CIS interface, pre-processing, enlargement andreduction of gray level image, and various halftoning algorithms. Implemented halftoning algorithms are simple thresholding, fuzzy based mixed mode thresholding, dithering, and edge enhanced error diffusion. The result of binarization is transferred to a printer with serial or paralel output ports. Line by line pipelined data prodessing architecture is employed with time sharing access of the external memory. In receiving mode, it converts the resolution of received binary image for compatibility with conventional facsimile. In copy mode, a line of A3 paper with 400 dpi is processed with in 2.5 ms. The prototype of image processor was implemented usig Laser Programmable Gate Array (LPGA) with 0.8.mu.m technology.

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