Design of Robust Double Digital Controller to Improve Performance for UPS Inverter

UPS 인버터의 성능 개선을 위한 강인한 2중 디지털 제어기의 설계

  • 박지호 (동명대학 기계자동화계열) ;
  • 노태균 (유한대학 디지털모터과) ;
  • 김춘삼 (삼척대 컴퓨터응용제어공학과) ;
  • 안인모 (마산대학 컴퓨터전기공학부) ;
  • 우정인 (동아대 전기전자컴퓨터공학부)
  • Published : 2003.04.01

Abstract

In this paper, a new fully digital control method for UPS inverter, which is based on the double control loop such as the outer voltage control loop and inner current control loop, is proposed. In the proposed control system, overshoots and oscillations due to the computation time-delay are compensated by explicit incorporation of the time-delay in the current control loop transfer function. The inner current control loop is adopted by an Internal model controller The Internal model controller is designed to a second order deadbeat reference-to-output response which means that its response reaches the reference in two sampling time including computational time-delays. The outer voltage control loop employing P-Resonance controller is proposed. The resonance controller has an infinite gain at resonant frequency, and the resonant frequency is set to the fundamental frequency of the reference voltage in this paper. Thus the outer voltage control loop causes no steady state error as regard to both magnitude and phase. The effectiveness of the proposed control system has been verified by the simulation and experimental results respectively.

본 논문에서는 UPS 인버터의 성능 개선을 위하여 출력측 LC 필터의 커패시터 전압과 전류의 2중 제어루프를 구성하고, 2중 제어루프에 디지털 제어시스템을 채택하였다 또한, 디지털 제어기의 연산지연시간을 보상하기 위하여 이러한 연산지연시간을 인버터 플랜트의 고유한 파라미터로 가정하고, 플랜트 모델에 포함시켜 모델링 하였다. UPS 인버터 출련전압의 과도상태 응답특실을 개선하고, 파라미터 변동에 강인한 특성을 얻기 위하여 2중 제어루프에서 내부 전류 제어루프는 내부 모델 제어기를 제안하였다. UPS 인버터 출력전압의 0의 정상상태 오차를 얻기 위하여 외부 전압 제어루프는 비례 제어기와 공진 제어기를 병렬로 연결한 비례-공진 진압제어기를 제안하였다.

Keywords

References

  1. IEEE Trans. Power Electronics v.11 no.4 Analysis and Design of a Multiple Feedback Loop Control Strategy for Single-Phase Voltage-Source UPS Inverters N.M. Abdel-Rahim;J.E. Quaicoe https://doi.org/10.1109/63.506118
  2. IEEE Trans. Power Electronics v.9 no.5 Disturbance Observer Based Fully Digital Controlled PWM Inverter for CVCF Operation T. Yokoyama;A. Kawamura https://doi.org/10.1109/63.321031
  3. IEEE Trans. Power Electronics v.10 no.2 Microprocessor-Based Robust Digital Control for UPS with Three-Phase PWM Inverter Y. Ito;S. Kawauchi https://doi.org/10.1109/63.372604
  4. 전기학회논문지 v.50B no.4 연산지연시간 및 민감성을 고려한 UPS 인버터용 2차 데드비트 제어기 김병진;최재호;Amit Jain
  5. IEEE Trans. Power Electronics v.11 no.1 Deadbeat Control of a Three-Phase Inverter with an Output LC Filter O. Kukrer https://doi.org/10.1109/63.484412
  6. IEEE Trans. Power Electronics v.11 no.2 Discrete-Time Current Control of Voltage-Fed Three-Phase PWM Inverters O. Kukrer https://doi.org/10.1109/63.486174
  7. Stational Frame Current Regulation of PWM Inverters with Zero D.N. Zmood;D.G. Holmes
  8. IEEE ISIE '01 Single Phase UPS Inverter with Variable Output Voltage and Digital State Feedback Control H. Gueldner;H. Wolf;N. Blacha
  9. 전기학회논문지 v.50P no.4 공진모델을 이용한 UPS 인버터의 강인한 디지털제어 박지호;허태원;노태균;김동완;우정인