The Journal of Korean Institute of Electromagnetic Engineering and Science (한국전자파학회논문지)

The Korean Institute of Electromagnetic Engineering and Science (한국전자파학회)
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Design and Fabrication of a Ku-Band Planar Limiter with PIN Diodes

PIN 다이오드를 사용한 Ku 대역 평판형 리미터의 설계 및 제작

  • Kim Tak-Young (SK Telecom Central Region Network Division) ;
  • Yang Seong-Sik (Department of Radio and Science Engineering, Chungnam National University) ;
  • Yeom Kyung-Whan (Department of Radio and Science Engineering, Chungnam National University) ;
  • Kong Deok-Kyu (Agency for Defense Development) ;
  • Kim So-Su (Agency for Defense Development)
  • Published : 2006.04.01
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Abstract

In this paper, the analytic design technique for a planar PIN diode limiter is presented rather than the conventional design heavily relying on the experiments. The novel analysis fur the PIN diode limiter shows the leakage is composed of two kinds of leakages and the relationship between the leakages and the PIN diode parameters. The designed limiter consists of 3 stages; the front two stages with two PM diodes and the final stage with Schottky diode pair. The fabricated limiter shows the insertion loss of 0.8 dB for the small input power, spike leakage of 12 Bm, flat leakage of 12 dBm for the 20 W RF power.

본 논문에서는 기존의 실험 위주의 설계 기법보다는 해석적 방법에 의하여 3단으로 구성된 평판형 리미터 설계 및 제작 기법을 제시하였다. 해석 결과 PIN 다이오드로 구성된 리미터에 고출력의 RF 입력이 인가될 경우 두 가지 형태의 누설 전력이 발생하며 이의 PIN 다이오드 파라미터와 연관성을 설명하였다. 설계된 리미터 회로는 1단과 2단은 PIN diode로 구성되며 3단은 Schottky 다이오드를 사용 구성하였다. 이를 통하여 제작된 리미터회로는 약신호시 삽입 손실 0.8 dB, 20 W RF 입력시 첨두 누설 전력(spike leakage) 12 dBm, 정상 누설 전력 12 dBm의 사양을 보여주고 있다.

Keywords

References

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