Journal of Welding and Joining

The Korean Welding and Joining Society (대한용접접합학회)
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Flip-chip Bonding Technology and Reliability of Electronic Packaging

전자 패키징의 플립칩 본딩 기술과 신뢰성

  • 윤정원 (성균관대학교 마이크로 전자 및 반도체 패키징 기술개발 사업단) ;
  • 김종웅 (성균관대학교 신소재공학과) ;
  • 구자명 (성균관대학교 신소재공학과) ;
  • 하상수 (성균관대학교 신소재공학과) ;
  • 노보인 (성균관대학교 마이크로 전자 및 반도체 패키징 기술개발 사업단) ;
  • 문원철 (성균관대학교 마이크로 전자 및 반도체 패키징 기술개발 사업단) ;
  • 문정훈 (수원과학대학 기계공학과) ;
  • 정승부 (성균관대학교 마이크로 전자 및 반도체 패키징 기술개발 사업단)
  • Published : 2007.04.30
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Abstract

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References

  1. J.H. Lau : Low Cost Flip Chip Technologies, McGRAW HILL BOOK Co., 2001, 1-17, 27-90
  2. J.H. Lau : Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies, McGRAW HILL BOOK Co., 1997, 1-9
  3. J.W. Yoon, W.C. Moon and S.B. Jung: Core technology of electronic packaging, Journal of KWS, 23-2 (2005), 116-123 (in Korean)
  4. J.W. Kim, D.G. Kim, W.C. Moon, J.H. Moon, C.C. Shur and S.B. Jung: Application of MEMS technology in microelectronic packaging, Journal of KWS, 24-2 (2006), 142-149 (in Korean)
  5. T. Velten, H. Heinrich Ruf, D. Barrow, N. Aspragathos, P. Lazarou, E. Jung, C.K. Mal다, M. Richter, J. Kruckow, and M. Wackerle : Packaging of Bio- MEMS: Strategies, Technologies, and Applications, IEEE Transactions on Advanced Packaging, 28 (4), (2005), 533-546 https://doi.org/10.1109/TADVP.2005.858427
  6. 전자부품연구원 전자정보센터 (web site:eic.re.kr)
  7. J.W. Kim and S.B. Jung : Effect of bonding force on the reliability of the flip chip packages employing anisotropic conductive film with reflow process, Materials Science and Engineering A, 452-453, (2007) 267-272
  8. O.V. Abramov : High-Intensity Ultrasonics, Theory and Industrial Applications, Gordon and Breach Science Publishers, 1998, 604-625
  9. Q.T. Huynh, C.Y. Liu, C. Chen, and K.N. Tu : Electromigration in eutectic SnPb solder lines, Journal of Applied Physics, 89 (2001), 4332-4335 https://doi.org/10.1063/1.1357459
  10. S.S. Ha: Master degree thesis, Sungkyunkwan University, (2006)
  11. D.G. Kim, J.W. Kim, S.S. Ha, J.P. Jung, Y.E. Shin, J.H. Moon, and S.B. Jung: Fabrication of through-hole interconnect in Si wafer for 3D package, Journal of KWS, 24-2 (2006), 172-178 (in Korean)
  12. Y.K. Tsui and S.W. Ricky Lee : Design and fabrication of a flip-chip-on-chip 3-D packaging structure with a through-silicon via for underfill dispensing, IEEE Transactions on Advanced Packaging, 28 (2005), 413-420 https://doi.org/10.1109/TADVP.2005.852833
  13. K. Hara, Y. Kurashima, N. Hashimoto, K. Matsui, Y. Matsuo, I. Miyazawa, T. Kobayashi, Y. Yokoyama, and M. Fukazawa : Optimization for chip stack in 3-D packaging, IEEE Transactions on Advanced Packaging, 28 (2005), 367-376 https://doi.org/10.1109/TADVP.2005.852978
  14. B. Morgan, X. Hua, T. Iguchi, T. Tomioka, G.S. Oehrlein, and R. Ghodssi : Substrate interconnect technologies for 3-D MEMS packaging, Micro- electronic Engineering, 81 (2005), 106-116 https://doi.org/10.1016/j.mee.2005.04.004
  15. K. Takahashi, M. Umemoto, N. Tanaka, K. Tanida, Y. Nemoto, Y. Tomita, M. Tago, and M. Bonkohara : Ultra-high-density interconnection technology of three-dimensional packaging, Microelectronics Reliability, 43 (2003), 1267-1279 https://doi.org/10.1016/S0026-2714(03)00167-7
  16. J.W. Yoon: Ph.D degree thesis, Sungkyunkwan University, (2006)
  17. J.W. Yoon, H.S. Chun and S.B. Jung : Reliability analysis of Au-Sn flip-chip solder bump fabricated by co-electroplating, Journal of Materials Research, 22 (5), (2007)

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