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A New Scaling Theory for the Effective Conducting Path Effect of Dual Material Surrounding Gate Nanoscale MOSFETs

  • Balamurugan, N.B. (Department of Electronics and Communication Engineering, Thiagarajar College of Engineering) ;
  • Sankaranarayanan, K. (Department of Electronics and Communication Engineering, VLB Janakiammal College of Engineering) ;
  • Suguna, M. (Department of Electronics and Communication Engineering, Thiagarajar College of Engineering)
  • Published : 2008.03.30

Abstract

In this Paper, we present a scaling theory for dual material surrounding gate (DMSGTs) MOSFETs, which gives a guidance for the device design and maintaining a precise subthreshold factor for given device parameters. By studying the subthreshold conducting phenomenon of DMSGTs, the effective conductive path effect (ECPE) is employed to acquire the natural length to guide the design. With ECPE, the minimum channel potential is used to monitor the subthreshold behavior. The effect of ECPE on scaling factor significantly improves the subthreshold swing compared to conventional scaling rule. This proposed model offers the basic designing guidance for dual material surrounding gate MOSFETs.

Keywords

References

  1. A. Chaudhry and M. J. Kumar, 'Controlling shortchannel effect in deep-submicron SOI MOSFETs for improved reliability: a review,' IEEE Transactions on Electron Devices, vol. 4, no. 1, pp. 99-109, 2006
  2. R. H. Yan, A. Ourmazd, and K. F. Lee, 'Scaling the Si MOSFET: from bulk to SOI to bulk,' IEEE Trans. Electron Dev., vol. 39, no. 7, pp. 1704-1710, 1992 https://doi.org/10.1109/16.141237
  3. K. Suzuki, T. Tanaka, Y. Tosaka, H. Horie, and Y. Arimoto, 'Scaling theory for double gate SOI MOSFETs', IEEE Transactions on Electron Devices, vol. 40, no. 12, pp. 2326-2329, 1993 https://doi.org/10.1109/16.249482
  4. C. P. Auth and J. D. Plummer, Scaling theory for cylindrical, fully-depleted, surrounding-gate MOSFETs, IEEE Trans. on Electron Devices, vol. 18, no. 2, pp. 74-76, 1997 https://doi.org/10.1109/55.553049
  5. K. K. Young, Analysis of conduction in fully depleted SOI MOSFETs, IEEE trans. Electron Devices, vol. 36, no. 3, pp. 504-506, 1989 https://doi.org/10.1109/16.19960

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