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Novel Bumping Material for Solder-on-Pad Technology

  • Choi, Kwang-Seong (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Chu, Sun-Woo (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Lee, Jong-Jin (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Sung, Ki-Jun (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Bae, Hyun-Cheol (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Lim, Byeong-Ok (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Moon, Jong-Tae (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Eom, Yong-Sung (Convergence Components & Materials Research Laboratory, ETRI)
  • Received : 2010.08.04
  • Accepted : 2010.11.02
  • Published : 2011.08.30

Abstract

A novel bumping material, which is composed of a resin and Sn3Ag0.5Cu (SAC305) solder power, has been developed for the maskless solder-on-pad technology of the fine-pitch flip-chip bonding. The functions of the resin are carrying solder powder and deoxidizing the oxide layer on the solder power for the bumping on the pad on the substrate. At the same time, it was designed to have minimal chemical reactions within the resin so that the cleaning process after the bumping on the pad can be achieved. With this material, the solder bump array was successfully formed with pitch of 150 ${\mu}m$ in one direction.

Keywords

References

  1. S.C. Johnson, "Flip-Chip Packaging Becomes Competitive," Semiconductor Int., May 2009.
  2. R. Lathrop, "Semiconductor Packaging Solutions Utilizing Fine Powder Solder Paste," Proc. Int. Wafer-Level Packaging Conf., 2008, pp. 129-136.
  3. K.-S. Choi et al., "Novel Maskless Bumping for 3D Integration," ETRI J., vol. 32, no. 2, Apr. 2010, pp. 342-344. https://doi.org/10.4218/etrij.10.0209.0396
  4. Y.-S. Eom et al., "Characterization of Polymer Matrix and Low Melting Point Solder for Anisotropic Conductive Film," Microelectron. Eng., vol. 85, 2008, pp. 327-331. https://doi.org/10.1016/j.mee.2007.07.005
  5. Y.S. Eom et al., "Electrical Interconnection with a Smart ACA Composed of Fluxing Polymer and Solder Powder," ETRI J., vol. 32, no. 3, June 2009, pp. 414-421. https://doi.org/10.4218/etrij.10.0109.0400
  6. IPC Std. J-STD-005, "Requirements for Soldering Pastes."
  7. K.S. Jang et al., "Catalytic Behavior of Sn/Bi Metal Powder in Anhydride-Based Epoxy Curing," J. Nanosci. Nanotechnol., vol. 9, no. 12, 2009, pp. 7461-7466.

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