Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
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Novel Single-State PWM Technique for Common-Mode Voltage Elimination in Multilevel Inverters

  • Nguyen, Nho-Van (Dept. of Electrical and Electronics Eng., Hochiminh City University of Technology) ;
  • Quach, Hai-Thanh (Dept. of Electrical and Electronics Eng., Hochiminh City University of Technology) ;
  • Lee, Hong-Hee (School of Electrical Engineering, University of Ulsan)
  • Received : 2011.07.19
  • Published : 2012.07.20
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Abstract

In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.

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References

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