Journal of the Institute of Electronics and Information Engineers (전자공학회논문지)

The Institute of Electronics and Information Engineers (대한전자공학회)
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IEEE std. 1500 based an Efficient Programmable Memory BIST

IEEE 1500 표준 기반의 효율적인 프로그램 가능한 메모리 BIST

  • Park, Youngkyu (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Choi, Inhyuk (Department of Electrical and Electronic Engineering, Yonsei University) ;
  • Kang, Sungho (Department of Electrical and Electronic Engineering, Yonsei University)
  • 박영규 (연세대학교 전기전자공학과) ;
  • 최인혁 (연세대학교 전기전자공학과) ;
  • 강성호 (연세대학교 전기전자공학과)
  • Received : 2012.11.08
  • Published : 2013.02.25
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Abstract

As the weight of embedded memory within Systems-On-Chips(SoC) rapidly increases to 80-90% of the number of total transistors, the importance of testing embedded memory in SoC increases. This paper proposes IEEE std. 1500 wrapper based Programmable Memory Built-In Self-Test(PMBIST) architecture which can support various kinds of test algorithm. The proposed PMBIST guarantees high flexibility, programmability and fault coverage using not only March algorithms but also non-March algorithms such as Walking and Galloping. The PMBIST has an optimal hardware overhead by an optimum program instruction set and a smaller program memory. Furthermore, the proposed fault information processing scheme guarantees improvement of the memory yield by effectively supporting three types of the diagnostic methods for repair and diagnosis.

Systems-On-Chips(SoC)에서 내장 메모리가 차지하는 비중은 비약적으로 증가하여 전체 트랜지스터 수의 80%~90%를 차지하고 있어, SoC에서 내장된 메모리에 대한 테스트 중요성이 증가하고 있다. 본 논문은 다양한 테스트 알고리즘을 지원하는 IEEE 1500 래퍼 기반의 프로그램 가능한 메모리 내장 자체 테스트(PMBIST) 구조를 제안한다. 제안하는 PMBIST는 March 알고리즘 및 Walking, Galloping과 같은 non-March 알고리즘을 지원하여 높은 flexibility, programmability 및 고장 검출률을 보장한다. PMBIST는 최적화된 프로그램 명령어와 작은 프로그램 메모리에 의해 최적의 하드웨어 오버헤드를 가진다. 또한 제안된 고장 정보 처리 기술은 수리와 고장 진단을 위해 2개의 진단 방법을 효과적으로 지원하여 메모리의 수율 향상을 보장한다.

Keywords

References

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