The Proceeding of the Korean Institute of Electromagnetic Engineering and Science (한국전자파학회지:전자파기술)

The Korean Institute of Electromagnetic Engineering and Science (한국전자파학회)
권호 표지

PCB 및 팩키징 구조에서의 전파 특성

  • Published : 2013.05.31
Download PDF
⟨ Previous Next ⟩

Abstract

Keywords

References

  1. P. G. Huray, S. Hall, S. Pytel, F. Oluwafemi, R. Mellitz, D. Hua, and Y. Peng, "Fundamentals of a 3-D 'snowball' model for surface roughness power losses", Proc. IEEE Workshop on Signal Propagation on Interconnects (SPI), pp. 121-124, May 2007.
  2. X. Gu, R. Rimolo-Donadio, Z. Yu, F. de Paulis, Y. H. Kwark, M. Cocchini, M. B. Ritter, B. Archambeault, A. Ruehli, J. Fan, and C. Schuster, "Fast physics-based via and trace models for signal and power integrity co-analysis", DesignCon, 2010.
  3. C. Schuster, G. Leonhardt, and W. Fichtner, "Electromagnetic simulation of bonding wires and comparison with wide band measurements", IEEE Trans. Advanced Packaging, vol. 23, no. 1, pp. 69-79, Feb. 2000. https://doi.org/10.1109/6040.826764
  4. M. Swaminathan, E. Engin, Power Integrity Modeling and Design for Semiconductors and Systems. Prentice Hall, 2007.
  5. H. W. Ott, Noise Reduction Techniques in Electronic Systems. 2nd ed., Wiley, 1988.
  6. A. E. Engin, K. Bharath, and M. Swaminathan, "Multilayered finite-difference method (MFDM) for modeling of package and printed circuit board planes", IEEE Trans. Electromagnetic Compatibility, vol. 49, no. 2, pp. 441-447, May 2007. https://doi.org/10.1109/TEMC.2007.893331
  7. R. Rimolo-Donadio, X. Gu, Y. H. Kwark, M. B. Ritter, B. Archambeault, F. de Paulis, Y. Zhang, J. Fan, H.-D. Bruns, and C. Schuster, "Physics-based via and trace models for efficient link simulation on multilayer structures up to 40 GHz", IEEE Trans. Microwave Theory and Techniques, vol. 57, no. 8, pp. 2072-2083, Aug. 2009. https://doi.org/10.1109/TMTT.2009.2025470
  8. D. Jiao, S. Chakravarty, and C. Dai, "A layered finite element method for electromagnetic analysis of large-scale high-frequency integrated circuits", IEEE Trans. Antennas and Propagation, vol. 55, no. 2, pp. 422-432, Feb. 2007. https://doi.org/10.1109/TAP.2006.889847
  9. A. E. Ruehli, A. C. Cangellaris, "Progress in the methodologies for the electrical modeling of interconnects and electronic packages", Proc. IEEE, vol. 89, no. 5, pp. 740-771, May 2001. https://doi.org/10.1109/5.929652
  10. G. Wollenberg, A. Goerisch, "Analysis of 3-D interconnect structures with PEEC using SPICE", IEEE Trans. Electromagnetic Compatibility, vol. 41, no. 4, pp. 412-417, Nov. 1999. https://doi.org/10.1109/15.809841
  11. K. J. Han, M. Swaminathan, "Inductance and resistance calculations in three-dimensional packaging using cylindrical conduction mode basis functions", IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 6, pp. 846-859, Jun. 2009. https://doi.org/10.1109/TCAD.2009.2016642
  12. K. J. Han, M. Swaminathan, and T. Bandyopadhyay, "Electromagnetic modeling of through-silicon via (TSV) interconnections using cylindrical modal basis functions", IEEE Trans. Advanced Packaging, vol. 33, no. 4, pp. 804-817, Nov. 2010. https://doi.org/10.1109/TADVP.2010.2050769
  13. P. Triverio, S. Grivet-Talocia, M. S. Nakhla, F. G. Canavero, and R. Achar, "Stability, causality, and passivity in electrical interconnect models", IEEE Trans. Advanced Packaging, vol. 30, no. 4, pp. 795-808, Nov. 2007. https://doi.org/10.1109/TADVP.2007.901567
  14. E. Song, J. Cho, J. Kim, Y. Shim, G. Kim, and J. Kim, "Modeling and design optimization of a wideband passive equalizer on PCB based on near-end crosstalk and reflections for high-speed serial data transmission", IEEE Trans. Electromagnetic Compatibility, vol. 52, no. 2, pp. 410-420, May 2010. https://doi.org/10.1109/TEMC.2010.2042452
  15. K. J. Han, H. Takeuchi, and M. Swaminathan, "Eyepattern design for high-speed differential links using extended passive equalization", IEEE Trans. Advanced Packaging, vol. 31, no. 2, pp. 246-257, May 2008. https://doi.org/10.1109/TADVP.2008.915849
  16. Y. Choi, H. Braunisch, K. Aygun, and P. D. Fran zon, "Analysis of inter-bundle crosstalk in multimode signaling for high-density interconnects", Proc. 58th Electronic Components and Technology Con- ference (ECTC), pp. 664-668, May 2008.
  17. J. Y. Choi, M. Swaminathan, "Decoupling capacitor placement in power delivery networks using MF- EM", IEEE Trans. Components, Packaging and Ma- nufacturing Technology, vol. 1, no. 10, pp. 1651- 1661, Oct. 2011. https://doi.org/10.1109/TCPMT.2011.2165954
  18. S. L. Huh, M. Swaminathan, and D. Keezer, "Constant current power transmission line-based power delivery network for single-ended signaling", IEEE Trans. Electromagnetic Compatibility, vol. 53, no. 4, pp. 1050-1064, Nov. 2011. https://doi.org/10.1109/TEMC.2011.2159980
  19. E. Matoglu, N. Pham, D. N. de Araujo, M. Cases, and M. Swaminathan, "Statistical signal integrity analysis and diagnosis methodology for high-speed systems", IEEE Trans. Advanced Packaging, vol. 27, no. 4, pp. 611-629, Nov. 2004. https://doi.org/10.1109/TADVP.2004.831856
  20. C. Wesley, B. Mutnury, N. Pham, E. Matoglu, and M. Cases, "Electrical design space exploration for high speed servers", Proc. 57th Electronic Components and Technology Conference (ECTC), pp. 1748- 1753, Jun. 2007.
  21. K. J. Han, M. B. Ritter, and X. Gu, "Electrical and physical parametric study of high-speed link perfor- mance", Proc. 19th Conference on Electrical Perfor- mance of Electronic Packaging and Systems(EPEPS), pp. 229-232, Oct. 2010.
  22. T. G. Ruttan, B. Grossman, A. Ferrero, V. Teppati, and J. Martens, "Multiport VNA messurements", IEEE Microwave Magazine, vol. 9, no. 3, pp. 56-69, Jun. 2008. https://doi.org/10.1109/MMM.2008.919919
  23. D. E. Root, J. Verspecht, D. Sharrit, J. Wood, and A. Cognata, "Broad-band poly-harmonic distortion (PH-D) behavioral models from fast automated simulations and large-signal vectorial network measurements", IEEE Trans. Microwave Theory Tech., vol. 53, no. 11, pp. 3656-3664, Nov. 2005. https://doi.org/10.1109/TMTT.2005.855728
  24. J. E. Schutt-Aine, P. Milosevic, and W.T. Beyene, "Modeling and simulation of high speed I/O links using X parameters", Proc. IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), pp. 29-32, Oct. 2010.
  25. J. S. Pak, J. Kim, D. H. Jung, J. Lee, K. Park, and J. Kim, "Optimized inverter design of ring oscillator based wafer-level TSV connectivity test (ROTSV- CT)", Proc. 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), pp. 239-242, Dec. 2012.
  26. O. Yaglioglu, B. Eldridge, "Direct connection and testing of TSV and microbump devices using Nano- PierceTM contactor for 3D-IC integration", Proc. IEEE 30th VLSI Test Symposium (VTS), pp. 96- 101, Apr. 2012.
  27. C. Schow, F. Doany, and J. Kash, "Get on the optical bus", IEEE Spectrum, vol. 47, no. 9, pp. 32- 56, Sep. 2010.