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Bit Interleaver Design of Ultra High-Order Modulations in DVB-T2 for UHDTV Broadcasting

DVB-T2 기반의 UHDTV 방송을 위한 초고차 성상 변조방식의 비트 인터리버 설계

  • Received : 2014.01.28
  • Accepted : 2014.04.08
  • Published : 2014.04.30

Abstract

The ultra-high definition television (UHDTV) has been considered as a next generation broadcsating service. However the conventional digital terrestrial transmission system cannot afford the required transmission data rate of UHDTV, and thus adopting ultra-high order constellation, such as 4096-QAM, into the conventional DTT systems has been studied. In particular, when the ultra-high order constellation is adopted into the digital video broadcasting-2nd generation terrestrial (DVB-T2) unequal-error protection (UEP) properties of a codeword of an error correction coding and ultra-high order constellations should be properly matched by bit mapper in order to enhance the decoding performance. Because long codeword results in a heavy computational complexity to design the bit mapper, the DVB-T2 divided it into cascaded blocks, the bit interleaver and the bit-to-cell DEMUX, and there have been many researches related to each block. However, there are few published study related to design methodology of bit interleaver. In this respect, this paper proposes a design methodology of the bit interleaver and presents bit interleavers of 1024-QAM and 4096-QAM according to the proposed design algorithm. The newly designed interleavers improved the decoding performance of the error correction coding by maximally 0.6 dB SNR over both of AWGN and random fading channel.

UHDTV(ultra-high definition television)가 초고해상도 방송 서비스를 지향하는 차세대 방송 서비스로 논의되고 있다. 그러나 상용 방송 시스템으로 UHDTV의 요구 전송량을 온전히 충족시킬 수 없으므로, 초 고차 성상을 이용한 전송량 증대관련 연구가 진행되고 있다. 특히, 기존의 시스템 중에서 UHDTV 전송에 가장 적합한 DVB-T2(Digital video broadcasting-2nd generation terrestrial) 시스템에 초 고차 변조를 적용할 경우 오류 정정부호의 부호어와 성상의 Unequal error protection을 적절히 이어주는 비트 매퍼가 필요하다. DVB-T2 시스템의 비트 매퍼는 비트 인터리버와 비트-셀 역다중화기로 나누어져 있으며, 두 가지 블록에 대한 많은 연구가 진행되었다. 그러나 비트 인터리버 설계와 관련된 연구가 부족하여 UHDTV 시스템에 적용될 초 고차 성상의 비트 인터리버 설계 방법론에 대한 정립이 필요하다. 이에 따라 본 논문은 DVB-T2의 비트 인터리버의 설계 방법을 제안하고, 1024-QAM과 4096-QAM의 비트 인터리버를 제안된 설계 방법을 통하여 설계하였다.

Keywords

References

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