I. INTRODUCTION

The rapid development of power electronics technology over the past decades resulted in the wide installation of power electronic devices. A large number of harmonic currents were injected into the grid; these currents consequently degraded power quality and negatively affected power systems [1]. As a result, harmonic control has become a widely studied issue [2]. Active power filters (APFs) can detect and compensate system harmonics and reactive power in real time, thus reducing the harmonic effect on the grid and ensuring efficient operation [3]. Compared with passive filters, APFs exhibit superior dynamic response, real-time capability, and controllability, which make these filters ideal for compensating harmonics and improving power quality [4].

To ensure the proper operation of APFs, DC-link voltage must be stabilized at a sufficiently high level, which ensures that the APF production of compensating current strictly adheres to control requirements to achieve the desired compensation effect [5]. However, high DC-link voltage requires large capacity to withstand capacitor voltage. This requirement significantly increases power consumption. Moreover, high DC-link voltage increases switching loss and switching noise [6], [7]. Therefore, the design of DC-link voltage value is an important task that requires detailed quantitative analysis and specification.

Only a few studies have investigated the APF control algorithm with DC-link voltage control [8]-[10], and discussion on the mathematical deduction of the minimum DC-link voltage for APF is limited. In [11], the effect of DC-link voltage on APF compensation characteristic was examined by focusing on the 5th negative and 7th positive harmonic sequences. The lowest required DC-link voltage is presented for the linear modulation range. However, focusing only on the 5th and 7th harmonics is insufficient, and the method used to determine a DC-link voltage was extremely complex to implement. In [12], the influence of DC-link voltage on APF the performance was analyzed, and a specification of the DC-link voltage rated value was presented. However, the Fourier transform analysis of harmonic current to obtain the expression used in this research only focused on a specified harmonic. Thus, various harmonics in practical applications may present a potential problem. In [13]-[15], a minimum DC-link voltage design for a power quality compensator and three-phase four-wire APFs with and without a neutral inductor were proposed. However, the influence of DC-link voltages, which were larger than the minimum value, on system performance was not investigated. Based on the analysis in [13]-[15], an adaptive DC-link voltage controller in which the DC-link voltage can be adaptively changed according to different reactive power compensations was deduced and proposed for the LC coupling hybrid APF with and without a neutral inductor [16], [17]. However, the inherent influence between the reactive power compensation and the DC-link voltage control was not discussed, and the proposed adaptive DC-link voltage control algorithm did not consider the harmonic current.

An adaptive DC-link voltage control algorithm for the three-phase four-wire center-split shunt APF remains lacking. In practical applications, grid voltage level varies under certain conditions, such that a large fluctuation may occur. The existing literature is deficient in that no mathematical deduction considered the APF DC-link voltage, the load harmonic current, and grid voltage level, and most shunt APF topologies operate at a fixed DC-link voltage level [5]–[12] [18]-[21]. In such case, changes in load may affect the performance of APFs with a fixed DC-link voltage. Moreover, APF compensation performance may not be guaranteed when the load harmonic current and grid voltage level fluctuate. Power consumption and switching loss are directly proportional to DC-link voltage [22], which suggests that APF will incur a large power consumption and high switching loss if high DC-link voltage is used, and vice versa. Therefore, if the DC-link voltage can be adaptively changed according to the variation of harmonic current and grid voltage level, the APF can operate under different minimum required DC-link voltage level s, such that compensation performance can be guarantee with low power consumption and switching loss.

The remainder of this paper is organized as follows: Section II presents a three-phase four-wire center-split shunt APF and its corresponding single-phase equivalent circuit model. Section III takes this model as a basis to analyze the relationship between DC-link voltage and system parameters, such that the required minimum DC-link voltage for APF can be deduced. Section IV presents the adaptive DC-link voltage controller for three-phase four-wire shunt APFs. Sections V and VI discuss the simulation and experimental verification of the minimum DC-link voltage deduction and the proposed adaptive DC-link voltage controller, respectively. Finally, Section VII concludes.

 

II. THREE-PHASE FOUR-WIRE CENTER-SPLIT SHUNT APF AND ITS SINGLE-PHASE CIRCUIT MODEL

The circuit of the three-phase four-wire center-split shunt APF is shown in Fig. 1. uSX is the grid voltage, and uCX is the inverter voltage. iSX, iLX, and iCX are the grid, load, and compensating currents for each phase, respectively, where subscript x denotes phases a, b, c, and n. Cdc and Udc are the DC-link capacitor and DC-link voltages, respectively, and the upper and lower DC-link capacitor voltages are UdcU = UdcL = 0.5 Udc. LS is the grid inductor and is normally neglected because of its relatively low value. The non-linear load is composed of a three-phase full-bridge rectifier and a resistance RL, which serves as a harmonic-producing load. The LCL filter that consists of LC, LG, ad CF is used to filter out the harmonics at switching frequency. Rd is used to suppress the resonance peak of the LCL filter at resonance frequency and to maintain system stability.

Fig. 1.Circuit of the three-phase four-wire center-split shunt APF.

The single-phase equivalent circuit model from the three-phase four-wire center-split shunt APF circuit configuration is shown in Fig. 2. uS is the grid voltage, uC is the inverter voltage, uL is the inductor voltage, and iC is the compensating current. An LCL filter behaves in a manner similar to an inductor at a low-frequency range below 2.5 kHz, and the common APF output current requirement depends on the 50th harmonic; thus, only the frequency range below 2.5 kHz have to be considered in control system design [23]. As a result, the LCL filter can reasonably be simplified as an inductor in the low-frequency range. The inductance value of this filter is determined by L = LC + LG, whereas R is the equivalent resistance of the inductor.

 

III. MINIMUM DC-LINK VOLTAGE DEDUCTION FOR THE THREE-PHASE FOUR-WIRE SHUNT APF

According to Kirchhoff’s voltage law, the following voltage equation can be obtained by employing the single-phase equivalent circuit in Fig. 2:

Fig. 2.APF single-phase equivalent circuit model.

To facilitate a detailed analysis, the grid and inverter voltages are defined as

where Usn is the effective value of the grid voltage; Uc1 and Ucn are the effective values of the fundamental and nth components of the inverter voltage, respectively;ω is the fundamental angular frequency; and θ and φ represent the initial phase angles of each component.

Assuming that the non-linear load current iL is composed of the load fundamental current iL1 and the load harmonic current iLh, we derive

where IL1 and ILh are the effective values of the fundamental and nth harmonic currents, respectively.

Assuming that the APF output current iC is composed of the fundamental component iC1 and the harmonic component iCh, we derive

The fundamental current IC1, which maintains the DC-link voltage and system power loss, is very small ( Ic1 ≈ 0 ) under a steady-state situation, such that the fundamental component of the APF output current iC1 can be simply neglected under a steady state (iC1 = 0) [16]. To compensate the load harmonics, the effect of the non-linear loads on power grid is eliminated by ensuring that the compensating harmonic current generated by APF is equal to the harmonic component of load current. Therefore, the APF output current iC can be rewritten as

Substituting (2), (3), and (6) into (1), the voltage equation becomes

According to Euler’s formula, the grid voltage, inverter voltage, and compensating current can be expressed as

where Re [*] is the operation symbol for extracting the real part of plural.

Substituting (8) into (7), the voltage equation becomes

In (9), the corresponding parts on both sides of the equation are the same frequency sinusoidal vector. Thus, Equation (10) can be derived when the real part extracting operation symbol Re is removed from either side of Equation (9).

In (10), the real and imaginary parts on both sides of the equation are equal. Thus, the following equations can be obtained:

The mold length of the inverter output voltage vector is defined as

According to (11) and (12), the maximal mold length of the inverter voltage vector can be expressed as

To provide sufficient DC-link voltage to compensate the load harmonic current, the relationship between the DC-link voltage and the maximal value of inverter voltage mold is given by

where m denotes the modulation index.

APF must be capable of producing a voltage that exceeds the maximal value of the inverter voltage vector mold to compensate the harmonic current produced by the nonlinear load completely. Substituting (13) into (14), the minimum DC-link voltage for the single-phase equivalent circuit model is obtained as

Some conclusions can be inferred from (15). First, with different grid voltage levels, coupling inductor values, equivalent resistances of the inductor, modulation indexes, and harmonic current contents, the APF requires different minimum DC-link voltage levels for operation. In addition, the value of the output inductor and its equivalent resistor affect the pulse-width modulation inverter output voltage component and the required minimum DC-link voltage, which should be considered in designing the output LCL filter. The modulation index is also an important factor to determine the minimum DC-link voltage level. Thus, the required DC-link voltage when using the Space Vector Pulse Width Modulation (SVPWM ) modulation method (m = 1.1547) [24] is lower than that when using the triangular PWM method (m = 1).

The current harmonics in each phase can be independently compensated in the three-phase four-wire APF [25]. Thus, the final required minimum DC-link voltage for the three-phase four-wire center-split APF will be the maximum among the calculated minimum values of each phase, as expressed in (15). Thus, the deduced minimum DC-link voltage expression can be used for both balanced and unbalanced loads.

 

IV. MINIMUM DC-LINK VOLTAGE DEDUCTION FOR THE THREE-PHASE FOUR-WIRE SHUNT APF

Equation (15) can be rewritten as

The right side of (17) can be written as

In (18), ΔU can be considered as the load harmonic contents that have to be compensated, as determined by the harmonic current. ΔU will increase when the harmonic current increases but decrease when the harmonic current decreases. In practical applications, the harmonic current frequently varies. Thus, the required minimum DC-link voltage will change with harmonic current variation. However, the APF topologies operate at a fixed DC-link voltage level in most existing studies [5]–[12]. According to the minimum DC-link voltage deduction, when the harmonic current decreases, a low DC-link voltage can facilitate normal APF function, which indicates that a fixed DC-link voltage results in additional power consumption and switch loss. Moreover, when the harmonic current increases, the DC-link requires a higher voltage level to ensure normal operation. In other words, a fixed DC-link voltage may result in an insufficient DC-link voltage that affects the normal operation and compensation effect of APF.

Based on (17) and (18), the left side of (17) can be written as

Equation (19) shows that ΔU can also be considered as the capability of APF to output a harmonic compensating current. Therefore, when the current modulation method in which the modulation index m is fixed has been determined, both DC-link voltage and grid voltage level affect the APF output compensating current capability and consequently influence APF compensation performance. Increasing the DC-link voltage can increase ΔU and thus improve APF compensation capability. Conversely, decreasing the DC-link voltage will reduce ΔU and thus diminish APF compensation capability. Similarly, decreasing the grid voltage level increases ΔU larger and thus improves APF compensation performance, whereas increasing the grid voltage level decreases ΔU and thus deteriorates APF compensation performance.

In the literature, APF topologies operate at a fixed DC-link voltage level [5]–[12]. However, in industrial applications, the grid voltage level is not constant. Such level may vary under certain circumstances and may even exhibit large fluctuations. Thus, APF is generally designed to function normally under the condition of grid voltage level fluctuation within ±10% . When the grid voltage level drops, low DC-link voltage can still achieve comparable compensation capability. That is, fixed DC-link voltage results in additional power consumption. Furthermore, when the grid voltage level increases, the capability of the APF output compensating current will decrease at a fixed DC-link voltage. Assuming that the effective value of the grid voltage is Usn = 220 V, the modulation index is m = 1.1547, and the LCL output filter inductance is L= 0.45 mH [23]. These system parameters are listed in Table I of Section V. The increase in APF output compensating current with increasing grid voltage level is shown in Fig. 3. When the APF is operated under normal condition Usn = 220 V, the peak value of the APF output 5th harmonic compensating current is i5th = 14.5 A. When the effective values of the grid voltage increase to Usn = 225, 231, 236, and 242 V, the values of the APF output 5th harmonic compensating current decrease to i5th = 13.8, 13.1, 12.3, and 11.5 A at a percentage decline of approximately 4.83%, 9.66%, 15.17%, and 20.69%, respectively. Furthermore, the peak value of the APF output 7th harmonic compensating current is i7th = 7.25 A when Usn = 220 V. When the effective values of the grid voltage increase to Usn = 225, 231, 236, and 242 V, the values of the APF output 7th harmonic compensating current decrease to i5th = 6.87, 6.5, 6.01, and 5.5 A at a percentage decline of approximately 5.24%, 10.34%, 17.11%, and 23.14%, respectively. A similar phenomenon occurs in other order harmonic compensating currents. In this situation, the APF output compensating current capability decreases. Consequently, compensation performance may not be guaranteed.

Fig. 3.Capability of APF compensating current change with various grid voltage levels.

To solve the abovementioned problems, an adaptive DC-link voltage controller for the three-phase four-wire shunt APF is proposed in this section. This controller consists of three main blocks: determination of minimum DC-link voltage, adaptive reference DC-link voltage level, and DC-link voltage feedback PI controller blocks. The proposed adaptive DC-link voltage control block diagram for the three-phase four-wire shunt APF is shown in Fig. 4.

Fig. 4.Proposed adaptive DC-link voltage control block diagram for the three-phase four-wire shunt APF.

A. Determination of Minimum DC-link Voltage

The required minimum DC-link voltage Udc-min for APF can initially be calculated according to the deduction in Section III. Based on the grid voltage level, coupling inductor value, modulation index, and harmonic current contents, the required minimum DC-link voltage value for APF is set from (1) to (16). When The minimum DC-link voltage value is affected by other factors, such as the change in the inductance and resistance values at different temperatures during operation. When these factors are considered, a voltage margin Udc-mar, which is shown in Equation (20), would be added to the minimum DC-link voltage level to avoid an insufficient DC-link voltage level even when the parameters of the output inductance filter and its equivalent resistance exhibit a 20% variation. This condition enhances the reliability of the block and absolutely guarantees the normal operation of APF.

To implement the adaptive DC-link voltage control function, Udc-ref = Udc-min + Udc-mar can be simply treated as the initial reference DC-link voltage.

B. Adaptive DC-link Voltage Reference Level

Based on Equation (18), the reference DC-link voltage can be written as

Equation (21) shows that the reference DC-link voltage Udc-ref is determined by ΔU and Usn. An adaptive controller can be designed to adjust the DC-link voltage reference value when the harmonic current and grid voltage level fluctuate.

Given that ΔU changes with harmonic current variation, determining different values requires the minimum DC-link voltage level. The adaptive DC-link voltage controller will adjust the DC-link voltage value when the harmonic current content changes, thus maintaining the DC-link voltage at the required minimum DC-link voltage and avoiding a case in which DC-link voltage is insufficient.

However, the required minimum DC-link voltage may frequently change as the load harmonic current varies, which randomly occurs. In this situation, the frequent change causes a rapid DC-link voltage fluctuation, which deteriorates APF operational performance. To mitigate this problem, the initial reference DC-link voltage will not be reset until a significant change in load is detected, such that the reference DC-link voltage can be maintained as a constant value within a specific range.

The controller will adaptively yield different DC-link voltage reference levels not only when the harmonic current changes, but also when the grid voltage level changes. The APF output harmonic current capability after applying the adaptive controller is shown in Fig. 5. Compared with that in Fig. 3 without the adaptive controller, the peak value of the APF output 5th harmonic compensating current is still maintained at approximately i5th = 14.4 A, although the effective value of the grid voltage increases to Usn = 225, 231, 236, and 242 V. In addition, the APF output 7th, 11th, 13th, 17th, and 19th harmonic compensating currents are also maintained at approximately i7th = 7.25 A, i11th = 4 A, i13th = 2 A, i17th = 1.75 A, and i19th = 1 A, respectively. This result shows that when the adaptive voltage controller is applied, the APF output compensating capability is unaffected by grid voltage level fluctuation.

Fig. 5.Capability for APF compensating current change with various grid voltages when the adaptive voltage controller is applied.

Nevertheless, the DC-link reference voltage may frequently change as the grid voltage varies occasionally. To mitigate this problem, the final reference DC-link voltage is classified into certain levels for selection. This classification depends on the different ranges of grid voltage level, as shown in Fig. 4, such that the reference DC-link voltage can be maintained as a constant value within a specific range [26]. In this way, the problem with DC-link voltage reference value fluctuation under adaptive voltage control method can be addressed. Finally, when the modulation index m and ΔU determined by harmonic current are fixed, the DC-link voltage reference value will be automatically adjusted with the variation of grid voltage level. The DC-link voltage reference value range is shown in Fig. 6.

Fig. 6.DC-link voltage reference value range when using the adaptive voltage controller.

The switching loss of the switching device can be classified as turn-on and turn-off losses. Equation (22) gives the total turn-on and turn-off power losses [22], where Udc, ICM, ICN, tRN, tFN, and fSW are the DC-link voltage, maximum collector current, rated collector current, rated rise time, rated fall time, and switching frequency, respectively. Thus, a higher APF DC-link voltage results in a higher the switching loss, and vice versa [15] [22]. If the DC-link voltage adaptively yields at the minimum DC-link voltage level according to different harmonic currents and grid voltage levels, the APF performance, power consumption, and switching loss will be optimized.

C. DC-link Voltage Feedback PI Controller

The APF can effectively control the DC-link voltage by feedbacking the DC-link voltage error signal as a positive fundamental active current component. The PI controller is applied to the DC-link voltage control loop. The DC-link capacitor can obtain energy and maintain a constant value through appropriate control. The difference between the DC-link reference voltage and the actual DC-link voltage is regulated by a PI regular. After regulation, the signal is added to the instantaneous positive fundamental active current component. Therefore, the reference current signal contains a fundamental active current, which indicates that the compensating current contains a fundamental active current component. This condition ensures the energy exchange between the DC and AC sides of APF and maintains the DC-link voltage at a reference level.

Through this adaptive controller, the DC-link voltage reference value will be initially set in the required minimum value, which may reduce power consumption and switching loss on the premise that APF operates normally. Another contribution of this controller is that once the harmonic current and grid voltage level change, the DC-link voltage reference value will be adaptively adjusted. The DC-link voltage reference value will first change according to the change in harmonic current. Then, the DC-link voltage reference value will increase as the grid voltage level increases to ensure efficient APF compensation performance. The DC-link voltage reference value will also decrease when the grid voltage level decreases, thereby reducing power consumption and switching loss. Thus, the optimal control of the DC-link voltage is achieved.

 

V. SIMULATION AND EXPERIMENTAL VERIFICATION OF MINIMUM DC-LINK VOLTAGE DEDUCTION

Simulations and experiments are performed on the three-phase four-wire shunt APF to verify the performance of the proposed controller. Simulation studies are conducted in MATLAB. A three-phase four-wire center-split shunt APF prototype is also implemented in the laboratory to verify the simulation results (Fig. 7). The simulated and experimental system parameters are listed in Table I. The PI controller is applied to the current control loop, and SVPWM modulation is applied to generate control signals in switches. In this section, the minimum DC-link voltage deduction is initially verified by simulations and experiments.

Without APF, the source currents contain a large amount of harmonics, and the total harmonic distortions (THDs) of the simulation and experimental load current are 24.39% and 25.13%, respectively. Therefore, the source currents are serious distortions. The values of every order harmonic current are listed in Table II. Even-order harmonics are generally largely offset in the three-phase system and can thus be ignored in the calculation process. Given that the load harmonic current beyond the 40th order is small the required minimum DC-link voltage calculation will consider only up to the 40th harmonic order for simplicity.

Fig. 7.Three-phase four-wire center-split shunt APF prototype.

TABLE ISYSTEM PARAMETERS

TABLE IIHARMONIC CURRENTS

Based on the abovementioned deduction and related system parameters, the required minimum DC-link voltage for the APF can be calculated by using Equations (1) to (15). The required minimum DC-link voltages are Udc-ref = 626.39 V in simulation and Udc-ref = 628.38 V in the experiment.

Fig. 8.Simulation DC-link voltage, as well as compensating and source currents when Udc=610V .

Fig. 9.Simulation DC-link voltage, as well as compensating and source currents when Udc=630V .

In simulation, when the DC-link voltage is 610 V, which is lower than the required minimum value of 626.39 V. The THD of the source current after compensation is 13.34%, which does not satisfy the international standard (THD < 8% for IEEE519-1992 [27]). The simulated compensating and source currents when the DC-link voltage Udc = 610 V are shown in Fig. 8.

When the DC-link voltage increases to Udc = 630 V, which is higher than the required minimum value of 626.39 V, the APF can operate at both inverter and rectifier modes to achieve efficient compensation performance with THD = 6.48%, which meets international standards [27]. The compensating and source currents when the DC-link voltage Udc = 630 V are shown in Fig. 9. The harmonics of the load current are significantly compensated. Meanwhile, the source current distortion is almost eliminated, whereas the source current is nearly sinusoidal.

Similar results are also obtained in experiments. When the DC-link voltage is 610 V, which is lower than the required minimum value of 628.38 V, the THD of the source current after compensation is 14.80%. The THD value does not satisfy the international standard because the APF is still operating at an insufficient DC-link voltage level. Moreover, when the reference voltage is further decreased to 590 V, the compensating current is seriously distorted, which distorts the supply current. The THD of the source current soars to 45.16%, a value that is even worse than that without compensation. Fig. 10 shows the experimental compensating and source currents after compensation when the DC-link voltage is Udc = 590 V. The DC-link voltage is unstable and uncontrollable. In this case, APF is operating at a poor state, which will negatively affect the power grid, the load, and the APF itself.

Fig. 10.Experimental DC-link voltage, as well as compensating and source currents when Udc=590V .

Fig. 11.Experimental DC-link voltage, as well as compensating and source currents when Udc=630V .

When the DC-link voltage increases to Udc = 630 V, which is higher than the required minimum value of 628.38 V, the APF achieves an efficient compensation effect with THD = 7.23%, which satisfies international standards [27]. Fig. 11 shows the experimental compensating and source currents after compensation when the DC-link voltage is Udc = 630 V.

When the DC-link voltages are increased to Udc = 650, 670, 690, 710, and 730 V, the THDs of the simulated source current are 6.23%, 6.08%, 5.87%, 5.81%, and 5.72%, respectively, whereas the THDs of the experimental source current are 7.11%, 6.92%, 6.77%, 6.58%, and 6.52%, respectively. These THD values obviously meet international standards. Table III shows the simulation and experimental compensation results of APF with different DC-link voltages.

TABLE IIICOMPENSATION PERFORMANCES

The results in Table III show that when the DC-link voltage is lower than the required minimum value, the APF is operating in the rectifier mode, and the variation in THD is large when the DC-link voltage is enhanced. As the DC-link voltage becomes closer to the required minimum value, the compensating performances improves. However, the compensation effect is not realized. Once the DC-link voltage is higher than the required minimum value, the APF can achieve superior compensation performance, in which the THD meets international standards and stabilizes. These simulation and experimental results verify the proposed APF minimum DC-link voltage deduction. Given the different grid voltage levels, coupling inductor values, and load current contents, the APF requires different minimum DC-link voltages for operation.

Based on the simulation and experimental results in Table III, the trade-off relationship between the THD and the DC-link voltage is shown in Fig. 12. When the DC-link voltage is higher than the required minimum value, increasing the value of the DC-link voltage alone cannot significantly improve the compensation effect. By contrast, power consumption and switching loss are directly proportional to the DC-link voltage [22], such that they may increase APF power consumption and loss. Compensation performance can be improved by adjusting the controller parameters or by applying better control algorithms (e.g., improved repetitive control [28], predictive control [29], and fuzzy control [30]), instead of increasing the DC-link voltage. Thus, APF power consumption and loss will not increase, and the APF can still operate in an ideal state, thus compensating the harmonic of load current and eliminating the harmonic pollution.

Fig. 12.Relationship between source current THD and DC-link voltage

 

VI. SIMULATION AND EXPERIMENTAL VERIFICATION OF PROPOSED ADAPTIVE DC-LINK VOLTAGE CONTROLLER

The minimum DC-link voltage design block was verified in Section V. In this section, the adaptive reference DC-link voltage level block will be verified by simulations and experiments. The system parameters listed in Table I are applied to maintain the consistency of the simulations and experiments.

The effect of the DC-link voltage controller when the harmonic currents change is analyzed. The fundamental and harmonic currents used to calculate THD do not correspondingly increase exponentially when harmonic currents change. Thus, the use of THD to compare APF performance before and after the harmonic currents change is inappropriate. Therefore, the single-order harmonic elimination rate R%, which is shown in Equation (23), is used to analyze APF performance.

The harmonic currents of a load with a resistance RL = 15 ohm are i5th = 8.58 A, i7th = 4.29 A, i11th = 3.43 A, i13th = 2.45 A, i17th = 2.14 A, and i19th = 1.71 A. After the compensation of APF with the minimum DC-link voltage Udc-ref = 630 V, the harmonic currents are i5th = 0.26 A, i7th= 0.21 A, i11th = 0.58 A, i13th = 0.25 A, i17th = 0.52 A, and i19th = 0.41 A. According to the harmonic elimination rate calculation in (23), the harmonic current elimination rates of each order are 96.97%, 95.11%, 83.19%, 89.79%, 79.71%, and 76.11%.

When the load resistance changes to RL = 7.5 ohm, the fundamental and harmonic currents increase. According to the abovementioned analysis and deduction, the APF-required minimum DC-link voltage increases. Without the adaptive DC-link voltage controller, the DC-link voltage remains at Udc-ref = 630 V. The experiment waveform is shown in Fig. 13(a). The harmonic current elimination rates in every order harmonic are 96.14%, 95.01%, 85.82%, 85.89%, 78.63%, and 73.92%, as listed in Table IV. The harmonic current elimination rates for every order harmonic current are lower than the values before the load changes. This result indicates that APF compensation capability decreases with the fixed DC-link voltage when harmonic current increases.

Fig. 13.Experiment waveform when the load changes. (a) Without adaptive voltage controller. (b) With adaptive voltage controller.

TABLE IVHARMONIC CURRENT COMPENSATION WITH AND WITHOUT ADAPTIVE DC-LINK VOLTAGE CONTROLLER WHEN LOAD CHANGES

Once the adaptive voltage controller is applied, the DC-link voltage value will be adaptively adjusted with harmonic current changes. According to the deduction, the DC-link voltage increases to a new required minimum voltage value of Udc-ref = 645 V. The experiment waveform is shown in Fig. 13 (b). The harmonic elimination rates are listed in Table IV. When the DC-link voltage increases to its new minimum voltage with the adaptive controller, the harmonic current elimination rates are 96.92%, 95.21%, 89.32%, 86.71%, 80.13%, and 75.96%, which are almost consistent with the values before the load changes. Thus, the adaptive voltage controller can maintain the DC-link voltage at the required minimum value with the variation of harmonic current, thus avoiding the insufficient DC-link voltage situation and ensuring the harmonic compensation capability of APF.

Thereafter, the effect of the DC-link voltage controller when the grid voltage level changes is analyzed. The condition without the adaptive reference DC-link voltage level block is studied. Based on the verified minimum DC-link voltage design block, the initial minimum DC-link voltage is set at Udc = 630 V, which ensures the ideal operation of APF with minimal power consumption and switching loss status. With the fixed DC-link voltage level, Fig. 14 presents the change in compensating and source currents when the grid voltage level changes at t = 0.3s by -10% and 10% in the simulation. Correspondingly, the experimental results when the grid voltage level varies are shown in Fig. 15. Table V outlines the compensation performance. The simulation and experimental results reflect the effect of the changes in grid voltage level on compensation performance. When the DC-link voltage is fixed, the THD of the source current after compensation will only slightly decrease with a 10% decrease in grid voltage level. Furthermore, when the grid voltage level increases by 10% , the compensating and source currents become seriously distorted because of the insufficient output capability of the fixed DC-link voltage. Meanwhile, the DC-link voltage oscillates and thus becomes unstable and uncontrollable. Hence, the compensation performance cannot be guaranteed, and the system runs under a poor state.

Fig. 14.Simulation waveform without adaptive voltage control when grid voltage level varies ±10% , variation occurs at t = 0.3s . (a) Grid voltage level changes by -10% . (b) Grid voltage level changes by +10% .

Fig. 15.Experiment waveform without adaptive voltage control when grid voltage level varies ±10% . (a) Grid voltage level changes by -10% . (b) Grid voltage level changes by +10% .

TABLE VCOMPENSATION PERFORMANCE WITHOUT ADAPTIVE VOLTAGE CONTROLLER WHEN GRID VOLTAGE LEVEL CHANGES

Once the adaptive voltage control block is applied, the DC-link voltage reference value will be adaptively adjusted with the variation of grid voltage level. The simulation and experimental results are shown in Figs. 16 and 17, respectively. The compensation performance with the adaptive controller is presented in Table VI.

The figures show that when the grid voltage level decreases by 10% from 220 V to 198 V, the DC-link voltage level adaptively decreases to a lower value of 580 V, and the THD is unchanged. Meanwhile, DC-link voltage becomes significantly lower than the fixed voltage of 630 V without the adaptive voltage control block. That is, a low DC-link voltage can still realize compensation. Power consumption and switching loss can be effectively decreased compared with the case with fixed DC-link voltage. Given that power consumption and switching loss are directly proportional to the DC-link voltage [22], low DC-link voltage can save on power consumption and reduce switching loss. Moreover, when the grid voltage level increases by 10% from 220 V to 242 V, the DC-link voltage level adaptively increases to a higher value of 680 V, and the THD basically remains unchanged. Compared with that in the case without the adaptive voltage block, this increase may avoid the output compensating current distortion caused by the insufficient output capability of APF when the grid voltage level increases, thus ensuring the operation of the APF and its satisfactory compensation performance.

Fig. 16.Simulation waveform with adaptive voltage control when grid voltage level varies ±10% , variation happens in t = 0.3s . (a) Grid voltage level changes -10% . (b) Grid voltage level changes +10% .

Fig. 17.Experiment waveform with adaptive voltage control when grid voltage level varies ±10% . (a) Grid voltage level changes by -10% ; (b) Grid voltage level changes by +10% .

TABLE VICOMPENSATION PERFORMANCE WITH ADAPTIVE VOLTAGE CONTROLLER WHEN GRID VOLTAGE LEVEL CHANGES

 

VII. CONCLUSIONS

This study proposed an adaptive DC-link voltage controlled in the three-phase four-wire shunt APF. The required minimum DC-link voltage for APF was deduced, and its minimum DC-link voltage design block was built to implement the adaptive DC-link voltage controller. The simulation and experimental results proved that once the DC-link voltage exceeds the minimum value, increasing its value alone will not significantly improve the compensation effect but will increase power consumption and switching loss. Thus, the DC-link voltage reference will be initially set to the required minimum value. Power consumption and switching loss can be effectively decreased on the premise that the APF operates normally.

The adaptive reference DC-link voltage control block with different harmonic currents and grid voltage levels was also built. The adaptive voltage control block can adaptively adjust the DC-link voltage reference value when the harmonic current and grid voltage level fluctuate to guarantee the operation of APF and maintain an ideal compensation performance, while reducing power consumption and switching loss compared with the traditional fixed DC-link voltage control. The viability and effectiveness of the required minimum DC-link voltage deduction and the proposed adaptive DC-link voltage control for the three-phase four-wire shunt APF were proven by both simulation and experimental results. Therefore, the proposed adaptive DC-link voltage controller is an optimal solution in practical applications.