The Journal of the Korea institute of electronic communication sciences (한국전자통신학회논문지)

Korea Institute of Electronic Communication Science (한국전자통신학회)
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A study on Source Stability Design Method by Power Integrity Analysis

전원무결성 해석에 의한 PCB 전원안정화 설계기법 연구

  • 정기현 (서울과학기술대학교 NID융합기술대학원) ;
  • 장영진 (서울과학기술대학교 일반대학원 미디어IT공학과) ;
  • 정창원 (서울과학기술대학교 NID융합기술대학원) ;
  • 김성권 (서울과학기술대학교 전자IT미디어공학과)
  • Received : 2014.06.21
  • Accepted : 2014.07.18
  • Published : 2014.07.31
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Abstract

This paper introduces the reduction design technique of the resonance phenomenon of the inner PCB based on power integrity from the analysis about the inner power supply line generating RLC resonance. With the technique, the resonant frequency resulted from the structural characteristics of the PCB can be analyzed and allows to predict and the capacitor for resonance phenomenon reduction can be decided as a decoupling capacitor. From the simulation result, it was confirmed that the PCB's resonance phenomenon reduction design technique should have the reduction effect in the inner motherboard of the industrial controller. This research will be contributed to the improvement of the safety of a PDN (Power Delivery Network) structure in the layout design technique of the PCB.

본 논문에서는 전원무결성(Power Source Integrity) 해석을 기반으로 PCB(Printed Circuit Board)내부 전원 선로의 RLC 공진(Resonance)현상을 해석하고 PCB내부 공진현상 감쇄를 위한 설계기법을 제시한다. 제시하는 기법은 PCB의 구조적 특성으로 형성되는 공진주파수를 예측하며, 공진현상 감쇄를 위한 디커플링 캐패시터의 적용위치 및 용량을 결정할 수 있다. 본 논문에서는 산업용 제어기 내부의 메인보드 회로 시뮬레이션 모델을 통해서 PCB 공진현상 감쇄 설계기법에 대한 타당성을 검증하였다. 본 연구결과는 향후, PCB 회로 설계에서 PDN(Power Delivery Network)구조의 안정도 향상에 기여할 것으로 기대된다.

Keywords

References

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