DOI QR코드

DOI QR Code

ISB Bonding Technology for TSV (Through-Silicon Via) 3D Package

TSV 기반 3차원 반도체 패키지 ISB 본딩기술

  • Lee, Jae Hak (Department of Ultra Precision Machines and Systems, Korea Institute of Machinery and Materials) ;
  • Song, Jun Yeob (Department of Ultra Precision Machines and Systems, Korea Institute of Machinery and Materials) ;
  • Lee, Young Kang (Department of Ultra Precision Machines and Systems, Korea Institute of Machinery and Materials) ;
  • Ha, Tae Ho (Department of Ultra Precision Machines and Systems, Korea Institute of Machinery and Materials) ;
  • Lee, Chang-Woo (Department of Ultra Precision Machines and Systems, Korea Institute of Machinery and Materials) ;
  • Kim, Seung Man (Department of Ultra Precision Machines and Systems, Korea Institute of Machinery and Materials)
  • 이재학 (한국기계연구원 초정밀시스템연구실) ;
  • 송준엽 (한국기계연구원 초정밀시스템연구실) ;
  • 이영강 (한국기계연구원 초정밀시스템연구실) ;
  • 하태호 (한국기계연구원 초정밀시스템연구실) ;
  • 이창우 (한국기계연구원 초정밀시스템연구실) ;
  • 김승만 (한국기계연구원 초정밀시스템연구실)
  • Received : 2014.08.12
  • Accepted : 2014.09.18
  • Published : 2014.10.01

Abstract

In this work, we introduce various bonding technologies for 3D package and suggest Insert-Bump bonding (ISB) process newly to stack multi-layer chips successively. Microstructure of Insert-Bump bonding (ISB) specimens is investigated with respect to bonding parameters. Through experiments, we study on find optimal bonding conditions such as bonding temperature and bonding pressure and also evaluate in the case of fluxing and no-fluxing condition. Although no-fluxing bonding process is applied to ISB bonding process, good bonding interface at $270^{\circ}C$ is formed due to the effect of oxide layer breakage.

Keywords

References

  1. Garrou, P., Bower, C., and Ramm, P., "Handbook of 3D Integration," WILEY-VCH, 2008.
  2. Tan, C. S., Gutmann, R. J., and Reif, L. R., "Wafer Level 3-D ICs Process Technology," Springer, pp. 72-83, 2008
  3. Al-Sarawi, S. F., Abbott, D., and Franzon, P. D., "A Review of 3-D Packaging Technology," IEEE Transactions on Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, Vol. 21, No. 1, pp. 2-14, 1998. https://doi.org/10.1109/96.659500
  4. Lannon, J., Gregory, C., Lueck, M., Huffman, A., and Temple, D., "High Density Cu-Cu Interconnect Bonding for 3-D Integration," Proc. of 59th Electronic Components & Technology Conference, pp. 355-359, 2009.
  5. Lee, C.-B., Jung, S.-B., Shin, Y.-E., and Shur, C.-C., "Effect of Isothermal Aging on Ball Shear Strength in BGA Joints with Sn-3.5Ag-0.75Cu Solder," Materials Transactions, Vol. 43, No. 8, pp. 1858-1863, 2002. https://doi.org/10.2320/matertrans.43.1858
  6. Tseng, H., Lu, C., Hsiao, Y., Liao, P., Chuang, Y., Chung, T., and Liu, C., "Electromigration-induced Failures at Cu/Sn/Cu Flip-Chip Joint Interfaces," Microelectronics Reliability, Vol. 50, No. 8, pp. 1159-1162, 2010. https://doi.org/10.1016/j.microrel.2010.05.002
  7. Pang, J. H. L., Chong, D. Y. R., and Low, T. H., "Thermal Cycling Analysis of Flip-Chip Solder Joint Reliability," IEEE Transactions on Components and Packaging Technologies, Vol. 24, No. 4, pp. 705-712, 2001. https://doi.org/10.1109/6144.974964
  8. Koopman, N. and Nangalia, S., "Fluxless Flip Chip Solder Joining," Proc. of NEPCON West, pp. 919-931, 1995.
  9. Agarwal, R., Zhang, W., Limaye, P., and Ruythooren, W., "High Density Cu-Sn TLP Bonding for 3D Integration," Proc. of 59th ECTC, pp. 345-349, 2009.
  10. Sakuma, K., Andry, P. S., Dang, B., Maria, J., Tsang, C. K., et al., "3D Stacking Technology with Low Volume Lead Free Interconnections," Proc. of 57th ECTC, pp. 627-632, 2007.