I. INTRODUCTION

PV power generation technology, which typically has a low-voltage high-current characteristic, attracts great attention as a next-generation energy source. The PV power control unit, however, basically demands a high-step-up DC–DC converter to interface with other electrical networks. Hence, various types of conventional high-step-up converter topologies have been proposed for low-voltage power sources [1]. Switched-capacitor or charge-pump circuits are generally used in the high-step-up applications. In a previous article, a conventional switched-capacitor series-connected flyback converter or a switched-capacitor coupled-inductor boost converter has successfully achieved an efficiency breakthrough even under a wide input voltage variations. The coupled-inductor method is a voltage-enhancement technique that uses core-sharing magnetic devices that integrate the functions of auto-transformers and inductors [2]. Several improved version of high step-up converters with a coupledinductor have also been introduced by adding a charge pump or a switched-capacitor cell because a flyback converter employing a coupled inductor is an isolation version of the low-efficiency buck-boost converter, as shown in Fig. 1(a) [3]. The voltage multiplier method is another enhancement technique using high-voltage capacitors and diodes [4]-[9]. With the help of the charge-pump switched capacitor inserted between the primary side and the secondary side of the coupled-inductor, the boost ratio was largely increased, whereas the rectifier-diode voltage stress was reduced closer to the output voltage. This method has a simple hardware; however, the output voltage of this method has discrete levels because of the absence of voltage regulation capability [10]-[16]. Moreover, the charge-pump cell has a limitation of voltage enhancement, i.e., double or triple. Therefore, multistage structures should be used in spite of the efficiency reduction.

Fig. 1.Comparison between a couple-inductor converter and a transformer-type switched-capacitor one.

Previous studies on the application of these engineering techniques to high-step-up converter topologies, particularly for low-voltage power sources, have reported some limitations. A previous article [17] mentioned that in a clampmode couple-inductor buck–boost converter [18], the output diode stress was similar to that of a traditional flyback converter, i.e., the output diode stress was higher than the output voltage, even with recycling the leakage energy of the coupled inductor. Further improvements were accomplished by combining a boost converter with a flyback converter [19], [20]. Compared with the converter in [18], the series combination of outputs of the boost and flyback converters improves the step-up ratio. Nevertheless, a problem still existed in [18]. By adding a switched capacitor in series with the transformer, a new high-ratio DC–DC converter with coupled inductor and switched capacitor was introduced in [21]. With the switched capacitor between the primary side and the secondary side of the coupled inductor, the boost ratio increases, and the output diode voltage stress was reduced. However, the magnetic core is not fully utilized because the operation does not include a transformer (on-time transfer) mode, but an inductor (off-time transfer) mode. A further-improved version is presented in [17]. This version combines pulse-width modulation (PWD) and resonant power conversions to increase the total power and to decrease the losses through a simultaneous energy transfer in an auxiliary inductor and a charge-pump capacitor. However, this version needs more devices for energy transfer [22]. Therefore, design complexity and cost can still be improved.

To handle these problems, a conventionally proposed switched-capacitor circuit that includes a transformer is introduced, as shown in Fig. 1(b) [22]. The circuit diagram of the proposed cell is similar to that of the conventional flyback converter, as shown in Fig. 1(a). However, the dot of transformer is the other side, which decides the operation principle critically [23]. The circuit has a very high step-up ratio, as well as isolation capability, through the use of a high turn ratio of the transformer. With the assumption that the transformer is ideal, the operating performance is extremely similar to the conventional switched capacitors. Therefore, the proposed cell was named the “isolated switched-capacitor cell” [22]. The secondary current flows directly to the load during the switch-on time, which helps the high efficiency, compared with the conventional forward-flyback topology [24]. The secondary winding coil of the transformer certainly has a parasitic resistance, which restricts the in-rush of the short current.

Then, the step-up ratio of the proposed cell is as follows:

where Vo is the output voltage, Vin is the input voltage, Ns is the primary turn ratio of the transformer, and Np is the secondary turn ratio. The step-up ratio is independent of the magnetizing inductance of the transformer [22].

The cell can be extended further by an auxiliary circuit such as a charge pump for a high step up. Fig. 2 shows a newly proposed charge-pump switched-capacitor cell that facilitates a charge-pump circuit with the transformer-type switched-capacitor cell.

Fig. 2.Proposed single-ended isolated charge-pump switchedcapacitor cell: note the dot pair. The cell is not a flyback.

The step-up ratio of the proposed cell is as follows:

where VC_cp is the voltage of the charge pump, which has the same boost ratio as the flyback converter.

The converter is cost effective because of the single switch and single magnetic device; however, the charge-pump cascaded single-output structure of the proposed cell requires a high-voltage rating devices for high-step-up applications because of the high-voltage stresses. In addition, the output capacitor should be of high voltage and large capacitance.

This paper proposes new converter topologies of both isolation type and non-isolation type that allow high step-up with a low turn-on ratio and small output ripple using a series connection of the outputs. With the magnetically coupling idea of the charge-pump switched-capacitor cell, flyback and tapped-inductor boost converters, which integrate each of the magnetic energy transfer modes together in alternatively driving method, are introduced in the proposed high boostratio DC–DC converter. In the high step-up topologies connecting the outputs serially, the entire output voltage ripple is reduced through phase differences of the charging or discharging time between the upper and lower capacitances. For example, if the charge-pump switched-capacitor cell and the flyback converter are separated in charging and discharging time, i.e., the charge-pump switched-capacitor cell charges the output capacitor in switch on-time, and the flyback converter charges the output capacitor in switch-off time, then the total output ripple is made smaller through connecting the outputs in a series with each one of the converters. The reduction in alternatively driving can be called an “interleaving” technique, even though it is not an exact 180° shift [10].

Not only the cost reduction from the magnetic device integration, but also the continuous energy transfer during the switch-on and -off in every switching cycle can increase the total power delivery by reducing the losses in the circuit. The conduction losses in the primary side of the transformer are also remarkably reduced because of the reduced input-current RMS value through the primary side. The superposition of the magnetizing and the switched-capacitor transferred current makes the primary current to slightly fluctuate. In addition, the proposed scheme decreases the voltage rating of the main switch or the diodes by correctly adjusting the turn ratio of the transformer, as well as by expanding the design criteria for part selection. In terms of extra advantages of the novel converter, the single-ended circuit system is comparatively simple and cost effective, and its efficiency is extremely high with a low turn-on ratio. The controller design will be interesting, being closely associated with the PV generator dynamic responses [25]; hence, it will be considered for future study.

The remainder of this study is organized as follows. Section II presents the proposal of a new isolated CSFB converter and operating analysis of the proposed converter. Section III presents the power loss analysis of CSFB converter and design guideline. In addition, section IV presents the proposal of a non-isolated CSFB tapped-inductor (CSFTI) boost converter and operating analysis of the proposed converter. Section V presents the power loss analysis of the CSFTI converter and the design guideline. In Section VI, the experimental results of the 100-W hardware prototype as a pre-regulating stage of the multistage photovoltaic power conditioning systems are given for topologies verification. Finally, a conclusions are presented in Section VII.

 

II. ISOLATED DC–DC CONVERTER USING CHARGEPUMP SWITCHED-CAPACITOR CELL

A. Structure of the Proposed CSFB Converter

The structure of the proposed isolated DC-DC converter is shown in Fig. 3. The primary has PWM voltages generated by a single main switch. The secondary has the isolated charge-pump switched-capacitor and flyback. Both of the outputs are serially connected to boost the output voltage.

Fig. 3.Proposed isolated CSFB converter.

The proposed converter makes effective utilization of the transformer because power is delivered during both switch-on and -off time. Furthermore, the output ripple is reduced through the phase difference between charging and discharging of the output capacitors.

B. CCM Transfer Gain of a CSFB Converter

To analyze the steady-state gain, the charge-pump switched capacitor and flyback converter can be analyzed using an equivalent circuit transformation, as shown in Fig. 4 [24]. Both of the output currents (IO_sc and IO_fb) are the same as load current ILoad because of the series connection. The following equations indicate each of the load resistances for the equivalent transformation:

where Vsc is the switched capacitor output, and Vfb is the flyback output.

Fig. 4.Equivalent circuit of the proposed CSFB converter having separated outputs.

As aforementioned, the steady-state voltage gain of the isolated switched capacitor cell is only determined by the turn ratio of the transformer winding. Meanwhile, the chargepump voltage is equal to the flyback converters. Thus, the voltage gain of the charge-pump switched-capacitor cell is as follows:

where D is the switching ratio. Each parameter of the derivation is denoted in Fig. 4. The steady-state voltage gain of the CCM flyback is derived as follows:

Consequently, the final input–output transfer function of the CSFB converter derived from the equivalent transformation in CCM is established as

C. DCM Transfer Gain of a CSFB Converter

To analyze the steady-state input–output DCM transfer gain of the proposed converter, the charge-pump switchedcapacitor and flyback converter can be analyzed by power balance and volt-second balance. The following equation indicates the relation of input power and output power:

where Vin is the input voltage, Is is the input current, Vo is the output voltage, RL is the load resistance, Resr is the parasitic resistance of the transformer winding (Ns2), and INs2 is the secondary current.

The input current (Is) is as follows:

where Lm is the magnetic inductance, and f is the switching frequency. From Equs. (7) and (8), the following equation can be derived:

Thus, Vo is as follows:

The final input–output transfer function of the CSFB converter derived from the equivalent transformation in DCM is derived as follows because 4RResrIns22 is negligible:

D. Operating Principles

The DCM operation, which eliminates the reverse recovery current of diodes, has some advantages in terms of power efficiency. The proposed converter has three operating modes, as shown in Figs. 5 and 6, according to the switching state.

Fig. 5.Equivalent circuit of the CSFB in each operation mode. (a) Mode 1. (b) Mode 2. (c) Mode 3.

Fig. 6.DCM waveforms of the proposed CSFB converter.

Mode 1: The current flows in the magnetizing inductance and the primary winding (Np) as a result of the switch (Q) turn-on. The primary current is transferred to the secondary (Ns2) coil of the isolated switched capacitor cell via the magnetic linkage (see Fig. 5, mode 1). Then, the secondary current is rectified into through the switched capacitor diode (Dsc), as shown in Figs. 5(a) and 6. The output capacitor (Cfb) discharges the load current because the flyback diode (Dfb) and charge pump diode (Dcb) are reverse biased.

Mode 2: When the switch (Q) is turned off, the switched capacitor diode (Dsc is reverse biased, and at the same time, the energy magnetically stored at Lm is released to the load through Dfb and Dcp of the charge pump and flyback converter (see Fig. 5, mode 2). The charge pump capacitor (Ccp) is charged by the reset current in this mode, as shown in Fig. 5(b), because the charge pump diode (Dcp) is forward biased. The output capacitor (Csc) discharges the load current because the switched capacitor diode (Dsc) is reverse biased.

Mode 3: The transformer is de-magnetized completely during this period, and the output voltage is maintained by the discharge of the output capacitors (Csc, Cfb) (see Fig. 5, mode 3). All rectifier diodes are reverse biased, as shown Fig. 5(c).

 

III. POWER LOSS ANALYSIS AND DESIGN GUIDELINE OF THE CSFB CONVERTER

A. Power Loss Analysis of the CSFB Converter

The power efficiency of the CSFB converter changes depending on the boosting ratio and the load condition. To find the optimal operating point, the loss breakdown of the proposed converter is performed. The efficiency is estimated through an efficiency simulation according to the loss analysis of the high-frequency transformer, MOSFET, and diodes. The detail of the estimation procedure is presented in Appendix A. From the loss breakdown, the efficiency calculation has been done using MATLAB simulation. Figs. 7 and 8 show the MATLAB simulation result of the proposed CSFB converter according to the variation of the output power and the variation of the input voltage.

Fig. 7.Simulation result of the proposed CSFB converter according to the variation of the output power.

Fig. 8.Simulation result of the proposed CSFB converter according to the variation of the input voltage.

B. Analysis and Design of the Transformer

The key design components of the proposed CSFB converter are transformer, MOSFET, diodes, output capacitor, and so on. The following section suggests an example of the design procedure for the CSFB converter.

To guarantee the prevention of core saturation, primary winding number (Np) should satisfy the constraint shown as follows,

The winding layer should be considered carefully for low leakage inductances that significantly contribute to the power efficiency and ringing suppression. To enhance the magnetic flux linkage, a coaxial cable transformer can be applied, as shown in Fig. 9 [26]. The coupling coefficient of an implemented transformer is more than 99.9%.

Fig. 9.Cross section of the coaxial cable.

The transformer turn ratio should be determined by the voltage gain specification. The desirable proper operating duty cycle is within a range of 0.35–0.65; therefore, from the transfer gain of CCM or DCM, depending on the application, the turn ratios are determined. In CSFB, because the voltage gain range is from 8.95 to 14, the winding number is chosen from the DCM gain equation, such as:

To analyze the critical inductance for the DCM of the proposed converter, CCM and DCM transfer gain can be used as follows:

Thus, the critical inductance is as follows:

In this design example, the inductance is determined as 80 μH for the DCM operating margin.

C. MOSFET and Diodes

The voltage stress of the MOSFET is derived as

The secondary-diode selection should consider voltage and current stresses, reverse-recovery characteristics, and so on. The voltage stress of charge pump VD_cp, switched capacitor VD_sc, and flyback diodes VD_fb are respectively shown as

and

Table I shows design results of CSFB rectifiers and MOSFET for the hardware prototype.

TABLE IDIODES AND MOSFET UTLIZED IN THE HARDWARE

D. Output Capacitors

As mentioned earlier, the proposed CSFB converter has a reduced output ripple through an alternating charging action of the output capacitors. In order to analyze the output ripple, each capacitor currents need to be analyzed. In Fig. 10(a), switched capacitor current ID-sc starts to charge at switch turn-on and starts to discharge when ID-sc becomes equal to the output current Io.

Fig. 10.Key waveforms of the diodes in the proposed topology.

Switched capacitor current ID-sc is as follows:

where Dx1T, which is the approximation discharging time, is as follows:

As shown in the last waveform in the figure, switch current isw becomes relatively more rectangular than that of previous topologies because of the superposition and triangular magnetizing current. This waveform contributes to the conduction loss reduction largely. As shown in Fig. 10(b), the flyback current starts to flow right after charge-pump charging (iDcp).

To find the start time of the flyback current, the conduction time correlation between the flyback and charge pump diodes need to be analyzed.

The average value of the flyback current (ID-fb) and the charge pump current (ID-cp) are the same. Therefore, the relationship between the currents is as follows:

where

and

and D1 is the reset ratio. Then, Dx2T, which means approximation discharging time, is as follows:

The output voltage ripple decided by the discharging time of both output capacitors is as follows:

where Co is an equivalent capacitance of both output capacitors. Consequently, the output capacitance for the 0.1% requirement output ripple is 7.89 μF.

 

IV. NON-ISOLATED CONVERTER USING THE PROPOSED CHARGE-PUMP SWITCHEDCAPACITOR CELL

A. Structure of the Non-Isolation Converter

The structure of the proposed non-isolated DC–DC converter is shown in Fig. 11. The primary has a PWM switching voltages generated by a single main switch in a tapped-inductor boost converter. The secondary has an isolated charge-pump switched capacitor and a flyback. All of the outputs are serially connected to boost the output voltage [27]. The converter is named the “CSFTI converter.”

Fig. 11.CSFTI boost converter.

As a CSFB converter, the proposed CSFTI converter makes an effective utilization of the transformer and the output ripple is reduced through the phase differences of the charging or discharging time among the output capacitors. Furthermore, the three outputs share the output voltage stress in series, so the application of Schottky diode is allowed.

B. CCM Transfer Gain of CSFTI Converter

To analyze the steady-state CCM transfer gain of the proposed CSFTI converter, the charge-pump switchedcapacitor, flyback, and tapped-inductor boost converters can be analyzed by output separation using an equivalent circuit transformation, as shown in Fig. 12. Output currents IO_sc, IO_fb , and IO_Tbst are the same because of the series connection in the series-connected CSFTI boost converter. Equ. (27) indicates each of the load resistances for the equivalent transformation:

where Vsc is the switched capacitor output, Vfb is the flyback output, and VTbst is the tapped-inductor boost output.

Fig. 12.Equivalent circuit of the proposed CSFTI converter having equivalent output separation.

As aforementioned, the steady-state voltage gain of the isolated switched capacitor is as follows:

where D is the switching ratio. The steady-state voltage gain of the CCM flyback is derived as follows:

The steady-state voltage gain of the CCM tapped-inductor boost converter is derived as follows:

Consequently, the final input–output transfer function is

C. Operating Principles

The CCM operation, which reduces the RMS value of the magnetic current, has a benefit in terms of power efficiency by applying Schottky diodes, which eliminates the reverse recovery current of the diodes [28]. The proposed converter has two operating modes, as shown in Fig. 13. The mode analysis can be used not only for the steady-state analysis but also for the dynamic analysis using a state-space averaging technique [29]-[31].

Fig. 13.Equivalent circuit of CSFTI in each operating mode. (a) Mode 1. (b) Mode 2.

Mode 1: The current flows in the magnetizing inductance and the primary winding (Np), as the switch (Q) turns on. The primary current is transferred to the secondary (Ns2) coil of the isolated switched capacitor cell via the magnetic linkage. Then, the secondary current is rectified into DC through the switched capacitor diode (Dsc). Because the flyback diode (Dfb), tap-inductor boost diode (DTbst), and charge pump diode (Dcp) are reverse biased, output capacitors Cfb and CTbst discharge the load current.

Mode 2: When the switch (Q) is turned off, the switched capacitor diode (Dsc) is reverse biased, and at the same time, the energy magnetically stored at Lm is released to the load through Dfb, DTbst, and (Dcp). Because the charge pump diode (Dcp) is forward biased, the charge pump capacitor (Ccp) is charged by the reset current in this mode. Because the switched capacitor diode (Dsc) is reverse biased, the output capacitor (Csc) discharges the load current in this mode.

 

V. POWER LOSS ANALYSIS AND DESIGN GUIDELINE OF THE CSFTI CONVERTER

A. Power Loss Analysis of CSFTI Converter

To find the optimal operating point, the loss breakdown of the proposed converter is performed. The efficiency is estimated through an efficiency simulation according to the loss analysis of the high-frequency transformer, MOSFET, and diodes. The detail of the estimation procedure is presented in Appendix B. As a CSFB converter, the power efficiency is maintained high in the entire input and load ranges.

B. Analysis and Design of the Transformer

Boost ratios of the CSFTI converter is determined by the transformer winding, as shown in the CCM transfer gain. Therefore, the first procedure is to decide the primary winding number (Np) for guarantee of high efficiency and of prevention from core saturation. Then, the next step is winding ratios.

The winding number of the transformer is chosen as

The critical inductance is as follows:

In this design example, the inductance is determined as 400 μH for the CCM operation margin.

C. MOSFET and Diodes

The voltage stress of the MOSFET, Vds-max, and the diodes are derived as

and

where the voltage stress of the tapped inductor is VD_Tbst, the switched capacitor is VD_sc, and the flyback diodes is VD_fb. Table II shows a design result of CSFTI rectifiers and MOSFET for the hardware prototype.

TABLE IIDIODES AND MOSFET UTLIZED IN THE CSFTI HARDWARE

D. Output Capacitors

The output capacitance for the output ripple is similar to the CSFB. All the difference is tapped-inductor boost capacitor CTbst, which has the same current waveform as that of Cfb. The ripple equation is approximately the same as Equ. (26).

 

VI. EXPERIMENTAL VALIDATION

A. Experimental Results of the CSFB Converter

To verify the aforementioned analysis, a 100-W hardware prototype of the CSFB PWM converter has been implemented. The hardware part list is presented in Table III.

TABLE IIIKEY PARAMETER OF CSFB CONVERTER HARDWARE

Fig. 14 shows the waveforms of the PWM gate signal, switch current, the secondary waveforms of the charge pump current, and the MOSFET drain–source voltage without a snubber. As shown in figure, the inductor of the charge pump switched capacitor and the flyback converter are operating in the DCM. From the results, the hardware waveforms agree well with the theoretical analysis shown in Section III. In the waveform of Ids, the switch current becomes more rectangular, which contributes to the conduction-loss reduction because of the small RMS value.

Fig. 14.Key waveforms of the hardware experiment (PWM: PWM gate signal; IC-CP : charge-pump current; Ids: drain–source current; Vds: drain–source voltage).

Fig. 15 shows the power efficiency according to the input voltage and the output power variation. According to the experimental results, the efficiency is greater than 97% in the gain range of 8–9 (35–40 V input). Then, the efficiency is gradually reduced as the input voltage, and the output power decreases, which is similar to the simulation in Section III. As the figure shows, the proposed CSFB converter maintains high efficiency over 95% in the entire operating conditions, along with good galvanic isolation.

Fig. 15.Experimental result of the CSFB converter according to the variation of the input voltage.

Fig. 16 shows a couple of the temperature distributions of a CSFB hardware with an identical operating condition, except the input voltage. The experiment was done at the ambient temperature, and the MOSFET and secondary diodes have no heat sink. The spot of main heat sources such as transformer (TR), main switch (MOSFET), and diodes (DCP, Dfb, and DSC) are indicated in the figure. The results show that the temperatures of the diodes are not significantly different, which means the loss changes in the diodes are quite small even though the voltage gain increases. The temperature of the main switch rises up to 48.1 ℃ from 41.5 ℃, and the primary winding also rises up to 69.1 ℃ from 61.0 ℃. The temperature measurement is explained well by the loss breakdown in Section III and efficiency measurement in Fig. 15. Based on the experimental results, a conclusion is drawn that the CSFB topology is effective for reducing the severe power stress in the extreme step-up-isolated converters.

Fig. 16.Comparison of the thermal distribution of the hardware prototypes. (a) Vin=25 V. (b) Vin=40 V.

B. Experimental Results of the CSFTI Converter

In terms of the CSFB converter, a 100-W hardware prototype of the proposed CSFTI PWM converter has been implemented to verify the operation principles and the performance of the converter. The implemented component data concerning the prototype are listed in Table IV.

TABLE IVKEY PARAMETER OF CSFB TAP-INDUCTOR BOOST CONVERTER HARDWARE

Fig. 17 shows the waveforms of the switch current, the secondary waveforms of the charge-pump current, and the MOSFET drain–source voltage without a snubber. As shown in the figure, the proposed converter operates in the CCM. From the results, the hardware waveforms agree well with the theoretical analysis shown in Section IV.

Fig. 17.Key waveforms. (IC-CP: charge-pump current; Ids: drain–source current; Vds: drain–source voltage).

Fig. 18 shows the power efficiency according to the input voltage and the output power variation. From the experimental results, efficiency is greater than 97% in the step-up gain of almost 10 (30–35 V input). As shown in the figure, the proposed CSFTI converter maintains a high efficiency of over 94% with high step-up ratio from 10 to 22 in the entire output variation.

Fig. 18.Experimental result of the CSFTI converter according to the variation of the input voltage.

C. Experimental Results of the Output Voltage Ripple

To verify the small output ripple that allows small output capacitances, a hardware prototype of the CSFB converter was tested. Table V shows the operating condition.

TABLE VTEST CONDITION OF CSFB CONVERTER HARDWARE

Fig. 19 shows the output voltage ripple and the flyback current. The equivalent capacitance of the output capacitors is 0.6 μF through the use of several tens of nano-Farad ceramic capacitors. As shown in Fig. 20, the output ripple waveform (VO) agrees well with the theoretical analysis shown in Chapter III.

Fig. 19.Key waveforms of the hardware experiment including an output voltage ripple.

Fig. 20.Key waveforms of the simulation with the output voltage ripple. Parameters are in the same order as in Fig. 19.

 

VII. CONCLUSION

In this paper, a pre-regulating DC–DC converters, specifically a series-connected CSFB converter for multistage photovoltaic power conditioning systems, has been proposed. The single-ended charge-pump-flyback operation contributing to the high-density power delivery of the transformer is quite beneficial to the enhancement of the output voltage with low cost. The operational principle of the proposed converter has been presented through obtaining the equivalent transformation from load-sharing ratio in a series output. An experimental result with a 100-W hardware prototype is also included to show that the proposed converter has a high efficiency that is greater than 97% in the range of 25–40 V input to 340 V output.

For the topology extension, another novel high-step-up series-connected CSFB converter employing a tappedinductor has been presented. The tapped inductor allows an extreme step-up voltage while maintaining a moderate duty ratio. In addition, the switching component stresses are decreased by the application of a charge-pump switchedcapacitor cell. All the subconverters are integrated with a single switch and a single magnetic device, leading to increase in the converter efficiency with minimum extra cost. The experimental results of a 100-W hardware prototype verify the performance estimation of extremely high efficiency.