I. INTRODUCTION

Digital control for switch-mode power converters (SMPCs) has gained more popularity in a wide range of applications due to its many advantages when compared to analog control, including design flexibility, lower sensitivity, elimination of passive tuning components, programmability, etc.[1]-[3]. For digital SMPCs, the two most important types of performance are the dynamic performance and the static performance. With the rapid development of electronic devices and large-scale digital integrated circuits, power converters are required to have a smaller area and a faster dynamic response.

Many of the classical control schemes for SMPCs have some inherent limitations in the design of the controller that can limit the stability margins, robustness and dynamic performance of a system. However, conventional PID controllers are commonly used in SMPCs due to their simplicity, intuition, and ease of implementation. Recent research trends in the PID control area have been well summarized in many studies. In [4], a Genetic algorithm is applied to discover the supreme values for the PID controller's parameters within a short time period. This algorithm has stability robustness, efficiency and optimum dynamic response in a very short time period. An online compensator auto-tuning method which tunes the parameters of the compensator has been proposed to achieve optimized dynamic performance in [5]-[6]. In addition, a fast PID method has been presented in [7]-[9]. In this method, the PID control is divided into two parts, the P control and the I-D control. An 8 bit A-D Converter is used for the P control and an 11 bit A-D Converter is used for the I-Dcontrol. However, these methods require relatively complex algorithmic steps to tune the control parameters, or extra software and hardware conditions [10]-[15]. In addition, they may introduce undesirable oscillations in the output. In [11], a novel trajectory prediction control algorithm has been presented. It uses current detection and voltage detection, requiring more than two A/D converters.

In order to overcome the aforementioned limitations, an adaptive digital PID (AD-PID) controller is presented in [15]. This controller reduces the output voltage deviation and settling time by changing the values of the parameters (Kp and Ki). One of the advantages of this method is that it is easy to implement. Nevertheless, this algorithm still has some risks in terms of dynamic performance and static performance. Based on this method, this paper presents a modified adaptive PID (MA-PID) control algorithm. This algorithm tunes the parameters (Kp, Ki and Kd) using predetermined rules, such as phase margin and gain requirements. The modified algorithm can further improve the dynamic performance (e.g. line transient response). However, it can also effectively eliminate the unstable facts that exit in the literature [15].

The following section introduces the modified adaptive PID control method and algorithm. In addition, it gives a description of the difference between the conventional and MA-PID controls. Section III describes the simulation process of a DC-DC buck converter using MATLAB software, and it presents simulation results. Section IV presents the process of FPGA implementation and an experimental comparison between the conventional PID and MA-PID controllers. Finally, some conclusion are given in section V.

II. MA-PID CONTROL TECHNIQUE

A. Conventional PID Control Law

An A/D converter, a compensator and a DPWM constitute a feedback loop, with which the power stage forms a closed-loop feedback system, as shown in Fig. 1. The purpose of the closed-loop system is primarily to adjust the output voltage Vout to match a precise and stable voltage reference Vref over a range of load currents, input voltage values and temperature variations [1].

Fig. 1.Block diagram of a power converter with digital controller.

Based on [16] and [17], a precise mathematical model of the converter can be established under non-ideal conditions. Using a small signal approximation, the open-loop gain function of the original ring without a compensating network can be written as equation (1).

Where ron, rl and rC are the switch-tube on-resistance, the equivalent series resistance of the inductance, and the equivalent series resistance of the capacitance, respectively.

Gm (s) =1/Um, and Um is the amplitude of the saw-tooth wave.

In [18], the essence of the compensation is to join the calibration device with a suitable frequency characteristic, and to make the shape of the frequency characteristic of the open-loop system into a desire shape, as follows:

According to the above principles, the transfer function of a digital PID compensator via the s-z transformation can be calculated as:

Where Kp, Ki and Kd are the constant coefficients of the proportional gain, integral term, and derivative term, respectively.

B. Modified Adaptive PID (MA-PID) Control Law

In general, the higher the loop bandwidths which can still guarantee the stability of the system, the better the dynamic performance of the closed-loop system. The theoretical bandwidth have to be under half of the switching frequency. However, the bandwidth of the loop is not more than one-tenth of the switching frequency in practical designs [20]. In the steady state, it may lead to unsteadiness if the bandwidth of a system is more than that limitation. Nevertheless, the dynamic performance can be improved by increasing the proper bandwidth in the transient state, which can be obtained by altering the values of Kp, Ki and Kd.

Fig. 2 shows the variation tendencies of the bode-plots for different values of Kp, Ki and Kd. From Fig. 2(a), it can be seen that as Kp increases, the bandwidth of the closed-loop system becomes higher and the phase margin decreases. From Fig. 2(b), it can be observed that the gain increases and the phase margin decreases when Ki increases. From Fig. 2(c), it can be seen that the cross-frequency of the system becomes higher and the phase margin increases as Kd increases. By comparing Fig. 2(a) and Fig. 2(c), it can be observed that these two parameters (Kp and Kd) are complementary and act as a mutual restraint. Hence, the three parameters should be properly adjusted in order to achieve the desired gain, bandwidth and phase margin requirements. Fig. 2(d) shows the variation tendencies of the bode-plots when Kp, Ki and Kd increase simultaneously. It can be seen from Fig. 2(d) that the compensated system has a proper phase margin, a sufficiently wide frequency band and a sufficiently large low-frequency gain to enhance the steady-state accuracy of the system and improve the transient response.

Fig. 2.The variation tendency of bode-plots for different values of Kp, Ki and Kd. (a) Kp increases. (b) Ki increases. (c) Kd increases. (d) Kp, Ki and Kd increase.

Therefore, a modified adaptive PID (MA-PID) compensator is proposed. It maintains a lower bandwidth in the steady state to make the system stable and has a higher bandwidth in the transient state, which can make the voltage deviation lower and the recovery time shorter. The transfer function of the MA-PID controller, as shown in Fig. 3, is given by:

Fig. 3.Adaptively digital PID compensator realization diagram.

Where α, β and γ are adaptively varied following the error signal during the transient state and remain zero in the steady state.

It can be observed from Fig. 4 that the error signal (verror) is divided into four states. These states are the rising transient state, falling transient state, transition state and steady state. Once the error signal (verror) surpasses the threshold voltage Vthe as a result of a transient, the values of α, β and γ, whose values are zero during steady state, are changed abruptly to different values in order to increase the bandwidth and gain of the loop. The MA-PID control algorithm tracks verror to detect its peak value (Verror-peak). Once the absolute value of the error signal changes, the values of α, β and γ are adjusted as given by (4), (5) and (6).

Fig. 4.Waveforms of MA-PID controller operation.

Fig. 5 shows a flowchart of the MA-PID algorithm. It can be seen that the value of Verror-peak is different for different dynamic variations. As in [15], Verror-peak is a variable but not fixed because the ratio of verrorand Verror-peak is not equivalent to one for all transient conditions. In addition, the error signal is handled specially during the transition state to avoid the number of overshoot/undershoot. Thus, the MA-PID control strategy has the ability to adapt and work well under different dynamic types.

Fig. 5.The flowchart of MA-PID algorithm.

III. SIMULATION PROCESS OF THE DC-DC CONVERTER

A. The Selection of Parameters for the Digital Controller

Based on the MATLAB/Simulation platform, the universal model of a DC-DC buck converter can be built in the Simulink environment. The following parameters are taken into account for the model, as shown in Table I.

TABLE IDESIGN SPECIFICATION FOR THE BUCK CONVERTER

With the specified parameters, the open-loop gain function of the original ring based on equation (1) can be calculated. Hence, the open-loop gain function, which is translated into z-domain by the zero-order hold, can be given by:

Equation (7) can be used to design a PID controller. The cross-over frequency of the compensated loop should be about one-tenth of the switching frequency, and the phase margin of the closed-loop system should be approximately 60 degrees [21]. The bode-plot-based technique and the root-locus technique are the common methods which can be operated using MATLAB’s Single-Input Single-output (SISO) tool in a trial-and-error process. On the basis of equations (2) and (7), the compensated loop can be achieved by means of the above techniques whose cross-over frequency and phase margin meet the requirements. By adjustment and observation, the transfer function of the PID compensator is obtained as follows:

Hence, the parameters of the PID controller are as follows: Kp =2, Ki =0.1, and Kd =4. Fig. 6 shows a bode plot of uncompensated and compensated closed-loop systems. It can be observed from Fig. 6 that the cross-over frequency of the compensated system is 114 kHz and that the phase margin is 65 degrees.

Fig. 6.Bode plot of converter with different control algorithms.

The parameters of the controller should be optimized to achieve a preferable dynamic response. Thus, the MA-PID control strategy is presented which smoothly transitions the PID parameters between steady state values and dynamic state values.

In order to obtain ΔKp, ΔKi and ΔKd, the parameters during the steady state should be adjusted until the original bandwidth is increased to approximately one-fifth of the switching frequency and the low-frequency loop gain is increased by 10%~30%. Therefore, ΔKp, ΔKi and ΔKd are the differences between the correspondingly newfound values and original values, respectively.

Based on the conventional PID parameters and the above design guidelines, the MA-PID parameters can be calculated. As a result, ΔKp =0.7, ΔKi =0.3, ΔKd =2.3, ΔKp2 =-1.8, ΔKi2 =-0.02 and Vthr =60mV. When compared with the conventional PID controller, the MA-PID controller possesses an additional 9% bandwidth and a 23% increase in the low-frequency gain. Table II indicates the values of the parameters in the design example.

TABLE IIVALUES OF THE PARAMETERS IN THE DESIGN EXAMPLE

B. The Establishment of a Simulation Model

Fig. 7 shows a MALAB/Simulink system model, which consists of an A/D converter, a compensator, a digital pulse width modulator and a power stage. The A/D converter is composed by delay, sample and hold, quantization and saturation blocks. Then, the DPWM module contains quantization, a limit block and a pulse width modulator which can generate the constant-frequency duty ratio signal to control the switch-tube. Buck converter block denotes the power stage which is realized by the state space averaging method, and can change the load resistor in order to simulate a transient response. The dynamic characteristics of the controller are reflected by applying a reduplicative step change in the load, which leads to a load current change.

Fig. 7.MATLAB/Simulink model of a buck converter with a digital controller.

As shown in Fig. 7, the compensator can be implemented by S-function code. S-function is a computer language to describe dynamic systems which can interact with the Simulink equation solver. As a rule, the algorithm is shown as:

From equation (9), it can be seen that the controller just needs the current (e(k)), previous (i.e. e(k-1), e(k-2)) samples of the error signal and previous values of the control output (u(k-1)). Table III shows the operational process of the conventional PID algorithm.

TABLE IIICONVENTIONAL PID ALGORITHM DESCRIPTION

For simulations of the PID and MA-PID architecture, the parameters Kp, Ki and Kd should use the corresponding specific values. For example, equation (9) can be rewritten for the MA-PID architecture as:

The transient response of the designed converter is shown in Fig. 8 in order to compare the PID control, the AD-PID control and the MA-PID control. The load transient response is simulated by producing a 500mA step in the Load. The line transient response is simulated with an input voltage change from 4V to 5V. It can be seen that there are no additional oscillations or ringing during the MA-PID operation, and that the MA-PID algorithm has a better line transient response than the AD-PID algorithm. Fig. 9 shows the simulated line and load transient responses with the MA-PID controller. Table IV summarizes the comparison results of the simulation recovery time. It can be observed that the MA-PID control algorithm reduces the recovery time by 25µs (>60%) in the overshoot and by 45µs (about 80%) in the undershoot under the line transient response. Meanwhile, for the load transient response, the recovery time is reduced by 15µs (about 50%) and 10µs (about 50%), respectively. Thus, the MA-PID algorithm immensely improves the dynamic response to enhance the system performance.

Fig. 8.Comparison of transient response between PID, AD-PID and MA-PID. (a) Input voltage charge between 4V and 5V. (b) Load charge between 0.5A and 1A.

Fig. 9.Transient simulation of the proposed MA-PID controller. Simulated (a) line transient response, (b) load transient response, top-to-bottom: input voltage, output voltage, inductor current.

TABLE IVCOMPARISON OF THE SIMULATION RECOVERY TIME OF BOTH METHODS

IV. FPGA IMPLEMENTATION OF THE MA-PID CONTROL ALGORITHM

Digital controllers based on Field-Programmable Gate Arrays (FPGAs) are widely used in various applications. They have some advantages such as flexibility, parallel computing capability and integration. The digital compensator and DPWM are the main part of the implemented digital control circuit based on a FPGA. They are described using Hardware Description Language (HDL). Fig. 10 illustrates the HDL blocks which will be synthesized on the FPGA. It can be seen that compensator module uses a look-up table, and that the DPWM module uses a hybrid structure.

Fig. 10.HDL block for synthesized on the FPGA.

For the static voltage requirement, this paper requires that the output voltage Vout should be kept at 1% around the reference voltage Vref =1.8V. In addition, according to the compensation method in section V, the actual controller parameters have a fractional part which cannot been realized directly using hardware description language. Therefore, the parameters should be amplified by a factor of 2n and rounded to their nearest value [22]. The amplification factor decides the rounding error, and the larger the factor is, the smaller the rounding error becomes. However, if the amplification factor is larger, the area consumption increases. Therefore, the compromise between the factor and the area is particularly important. Finally, the duty command u(k) in equations (9) and (10) should be scaled to 1/2n to compute the actual duty ratio.

In order to test these two control algorithms, a buck converter prototype has been implemented as shown in Fig. 11. The power MOSFET transistor is a UPA2791, and the driver chip is a UCC27524. An Altera Cyclone II chip (EP2C50208C8N) is used to implement the conventional PID and MA-PID control algorithms. The input voltage vin = 5V is set to the closed-loop to achieve an output voltage at 1.8V. Fig. 12 shows the output voltage transient waveforms of the converter with the conventional PID and MA-PID controllers under load current changes. The results indicate that the MA-PID control algorithm possesses a lower amplitude of overshoot/undershoot, a faster recovery time and a smaller voltage deviation. The recovery time of the MA-PID controller is about 300μs, which is a reduction of 60%, and the amplitude of the undershoot is 34mV, which is a reduction of 53%, when compared with the conventional PID controller.

Fig. 11.A buck converter prototype and control system (FPGA+ADC).

Fig. 12.Transient waveforms under load change of 0.8 to 1.5A Top-to-bottom: output voltage, load current. (a)Conventional PID. (b)MA-PID.

Fig. 13 shows the corresponding steady-state output voltage under a different load current. It can be seen that the proposed MA-PID control algorithm achieves a smaller steady-state deviation (<18μV/mA), when compared with the conventional PID algorithm.

Fig. 13.Output voltages under different load currents.

The specifications and performances of the proposed

MA-PID control algorithm are compared with those reported for DC-DC converters in recent studies. This comparison is summarized in Table V. It shows that the proposed MA-PID control algorithm achieves a better load step response than those of references [23]-[25] and a LTC3530 chip under the condition of reduced hardware requirements.

TABLE VSUMMARY OF THE SPECIFICATIONS AND PERFORMANCES OF THE PROPOSED MA-PID CONTROL ALGORITHM AND PRIOR ARTS

V. CONCLUSIONS

This paper presents a modified adaptive PID algorithm for digitally controlled DC/DC buck converters. The proposed algorithm does not require any additional components, and it does not detect any extra signals which reduces the complexity and cost of the controller. In addition, this paper also gives a step-by-step design flow of models, simulations and implementations based on FPGA for DC/DC converters. The simulation results indicate that the proposed control algorithm improves the line and load transient responses when compared with the conventional PID and AD-PID algorithms. Meanwhile, it can be seen from the experimental results that the proposed MA-PID algorithm possess better dynamic performance, such as a faster recovery time, a smaller steady-state deviation and a lower amplitude of the overshoot/undershoot.

Although this paper uses a Buck-type power converter topology as an example, a similar concept can be extended to other digital control switching converter systems.