1. Introduction

In low-cost and low-power industrial applications, single- and two-phase motors are widely applied due to the advantage of their simple and robust structure, as well as simple controls [1-2]. In a single-phase motor drive, a single-phase induction motor is popular and easy to work when fed by a single-phase AC power source. A single-phase induction motor can usually be taken as a special two-phase motor because it contains a main winding and an auxiliary winding [3]. The main types of single-phase induction motor are split-phase, capacitorstart, and capacitor-run motors. However, most single-phase inductions cannot regulate speed over a wide range because the auxiliary winding is designed to start the motor in low speed [4]. To improve the starting performance of a single-phase induction motor, the auxiliary winding in series with a capacitor or boost converter can expand the speed range using a two-phase six-switch inverter [5]. Although the system performance is improved, there is a new requirement for two switches connected to the auxiliary winding that can pass higher operating current and voltage through compared to that of the rest of the eight switches [6]. This increases the cost of the total hardware system compared with a traditional six-switch inverter for three-phase motor drives [6].

Another alternative is a two-phase motor drive which utilizes a two-phase motor with two symmetrical windings. Currently, it had received more attention because of its low electrical and acoustic noise, as well as its high efficiency [7]. Different inverter topologies have been proposed for two phase motor drives, such as two-phase four-, six-, and eight-switch inverters. In the motor drives with a four-switch inverter, the neural point of two capacitors in series is connected to the common end of the two motor windings, leading to an uncontrollable voltage and eventually a big torque ripple [8]. The topology of a six-switch inverter has a disadvantage in that two switches in series connected to the common end should have a higher power rating to bear up against the force of a bigger current compared with the others. The eight-switch inverter is a preferable solution for two-phase motor drives, except for the slightly higher cost of an additional two switches compared to the six-switch inverter [9].

Moreover, to achieve better performance with a two-phase motor drive, high performance control methods and techniques represent the second best alternative. The control methods of vector control and direct torque control (DTC) are the most popular in both high-performance and low-cost applications [10]. Meanwhile, the techniques of sinusoidal pulse-width modulation (PWM), hysteric PWM, and space voltage PWM (SVPWM) are widely applied to optimize the performance of a two-phase motor drive [11]. In this paper, we investigate two improved SVPWM schemes for a vector control based two-phase permanent magnet synchronous motor (PMSM) drive. Compared with a two-phase induction motor, a two-phase PMSM with two symmetric windings carries some advantages including a more compact size, high torque density, and a high torque to current ratio; also, it has been utilized in many low-power applications and household products. Therefore, the improved SVPWM schemes reduce the switching frequency and further reduce the noise. The experimental results show that the drive with the new PWM schemes achieves better performance compared with the normal scheme.

2. Space Vector PWM Scheme for Two-phase PMSM Drives

It is well known that PWM inverter-powered motor drives offer better efficiency and higher performance compared to fixed frequency motor drives. Three popular PWM techniques, sinusoidal PWM, hysteric PWM, and SVPWM, are mainly applied in the field of three-phase AC motor drives [7]. Due to its advantages and compatibility for use in field orientation of AC motors, SVPWM is one of the more popular techniques used to generate sinusoidal line-to-line voltages and currents with a three-phase inverter. Compared with other PWM techniques, the SVPWM technique utilizes DC bus voltage more efficiently and generates less harmonic distortion in a three-phase voltage-source inverter. However, the SVPWM technique is also used for two-phase voltage-source inverters to improve the performance in a two-phase motor drive. The SVPWM technique of a two-phase full bridge voltage-source inverter for two-phase PMSM drives is addressed below.

A two-phase full bridge inverter consists of two single-phase full bridge inverters fed to a two-phase PMSM motor with two separate and symmetrical windings distributed as a 90° phase shift to each other. One single-phase full bridge contains four switches (S1, S2, S7, and S8) and four diodes (D1, D2, D7, and D8), and the other contains four switches (Q3, Q4, Q5, and Q6) and four diodes (D3, D4, D5, and D6). Two stator windings (A and B) are connected to two single-phase full bridge inverters, respectively, by four ends represented by a, x, b, and y. A block diagram of the two-phase motor drive with a two-phase eight switch inverter is shown in Fig. 1.

Fig. 1.Two-phase full bridge inverter fed to a two-phase 0 0 0 motor

The voltages of a two-phase motor can be represented by the space vector model. In the two-phase full bridge inverter, the winding ends of a, x, b, and y can be applied with positive or negative voltage. Therefore, different switching states can achieve 16 voltage vectors, including 12 active vectors of V0(1000), V45(1010), V90(0010), V135 (0110), V180 (0100), V225 (0101), V270 (0001), and V315(1001), and four zero vectors of V00(0000, 1111, 0011, 1100). The four-digit numbers represent the switching patterns of the four legs in the inverter. “0” denotes that the winding end is connected to a positive voltage of the DC power source, and “1” denotes that the end is connected to a negative voltage. In order to generate a rotating field, the inverter has to be switched for eight of the 16 vectors. The eight nonzero voltage vectors are 45° apart from one another. Their space distribution in a two-dimensional voltage vector space is divided into eight sectors of I, II, III, IV, V, VI, VII, and VIII, as shown in Fig. 2. The switching patterns and corresponding voltage outputs of the inverter are shown in Table 1. Va and Vb are the projection of the voltage vector, respectively, and the vector’s amplitude, Vs, is the square root of the two components. The maximum amplitude of the voltage circular trajectory locus is Vdc.

Fig. 2.Space voltage distribution of a two-phase full bridge inverter

Table 1.Switching patterns and corresponding outputs of a Two-phase full bridge inverter

SVPWM achieves less harmonic distortion in the output voltages and currents in the windings of the motor, as well as a more efficient use of the DC supply voltage compared to the sinusoidal PWM technique. SVPWM of two-phase motor drives refers to a special way of determining the switching sequence of the upper four power transistors of a two-phase full bridge inverter. Its point is to approximate the reference voltage instantaneously by combining the switching patterns corresponding to two basic space voltage vectors. For each position inside of the sector, the time can be calculated, and then applied to the appropriate inverter switching states.

In Fig. 3, two basic vectors of V1 and V2 and the zero vector, V00, are used to synthesize the reference voltage vector, Vr. The switching states in Sectors I and II are also illustrated in Fig. 3. There are four PWM channels with a fixed switching order relative to one another, and every channel with a symmetric PWM pattern switches twice for every PWM period. The zero vectors, V00, are inserted at the two ends and at the middle of every period. During one sampling period of Ts, the timeframes of T1 and T2 can be calculated to determine the switching states according to the following equations:

where θ1 and θ2 denote the vector angles between two basic voltage vectors and the reference voltage vector, respectively, as shown in Fig. 3. The basic vectors and the vector angles in the eight sectors are given in Table 2.

Fig. 3.Space-vector PWM based symmetric switching scheme of a two-phase full bridge inverter in Sectors I and II

Table 2.Basic voltage vectors and the angle of the reference voltage vector synthesis

In Table 2, θ is the angle of the reference voltage vector, Vr. To achieve a symmetric PWM pattern in the SVPWM of two-phase motor drives, each PWM channel switches twice every sampling period. Therefore, two basic voltage vectors have to be adjusted according to the position of the reference voltage vector in each of the different sectors, as shown in Table 2. The PWM patterns of the other sectors (III, IV, V, VI, VII, and VIII) can be derived by Fig. 3 and Table 2.

In the digital signal processor, the PWM waveforms are usually generated by the comparators in the PWM period. One comparator can be treated as a PWM channel, as shown in Fig. 4. Four comparative values (TB, TA, TB+T1, and TA) are input to four different channels, and each PWM channel generates two complementary PWM waveforms with a symmetric pattern in Sector I, such as PWM1 and PWM2, PWM3 and PWM4, PWM5 and PWM6, and PWM7 and PWM8. For any PWM signal, four zero vectors are distributed at the start, middle, and end positions, and two basic vectors (V1 and V2) are wrapped around zero vectors. There are eight PWM signals represented by PWM1, PWM2…, PWM8 for a two-phase voltage-source inverter driving a two-phase PMSM. The time durations in Fig. 4 are given as follows:

Fig. 4.The switching patterns and duty cycles in Sector I for the normal SVPWM scheme

According to the aforementioned contents in Fig. 4 and Table 2, the normal space-vector PWM based symmetric switching patterns of the two-phase inverter for six sectors are derived as in Fig. 5.

Fig. 5.Space-vector PWM based symmetric switching patterns of a two-phase full bridge inverter in eight sectors

In Fig. 5, the arrangements of the switching patterns in the eight sectors are summarized as (V00, V1, V2, V00, V00, V2, V1, V00) with the following properties:

1. Each of the four PWM channels switches twice every PWM period unless the duty cycle is 0% or 100%; 2. In every sector, there is a fixed switching order among all PWM channels; 3. Zero voltage vectors (V00) are inserted at the start, middle, and end positions of the PWM pattern during each PWM period; 4. The number of zero vectors is the same as the number of basic voltage vectors in each PWM period.

To verify the space-vector PWM scheme, the experimental results for all of the switching patterns in each of the eight sectors are illustrated in Figs. 6 and Fig. 7.

Fig. 6.The experimental results of the PWM signals of four switches S1, S3, S5, and S7 for the normal SVPWM scheme after 50ms. (Horizontal axis: 5ms/div; Vertical axis: 1) PWM1: 5V/div, 2) PWM3: 5V/div, 3) PWM5: 5V/div, 4) PWM7: 5V/ div).

Fig. 7.The experimental results of the PWM signals of four switches S1, S3, S5, and S7 for the normal SVPWM scheme after 0.2 ms when the reference voltage is located in Sector I. (Horizontal axis: 20us/div; Vertical axis: 1) PWM1: 5V/div, 2) PWM3: 5V/div, 3) PWM5: 5V/div, 4) PWM7: 5V/div).

It is known in Fig. 6 and Fig. 7 that all of the switches of the inverter are always working in the switching state with a high frequency. Each switch of the inverter has the same switching loss in every period. To produce the reference voltage vector effectively, the switching patterns in each of the eight sectors are different. The experimental results are in agreement with the basic principle of the normal SVPWM scheme.

3. Proposed Space-vector PWM Schemes for Two-phase PMSM Drives

To improve the performance of the above SVPWM for two-phase motor drives, two effective SVPWM schemes are proposed to reduce switching losses.

3.1 Proposed PWM scheme I

In order to achieve lower switching losses, a new PWM scheme is investigated to synthesize the same reference voltage vector with a reduced switching frequency. The time duration TA is fixed to a constant of Ts which can keep the output signals of two PWM channels constant in a cycle. The detailed implementation method of the proposed PWM scheme I is illustrated in Fig. 8.

Fig. 8.The switching patterns and duty cycles in Sector I for the proposed SVPWM scheme I

In Fig. 8, four comparative values (TB, TA, TB+T1, and TA) are used to generate four pairs of complementary PWM waveforms with symmetric patterns in Sector I using four comparators in the digital signal processor. However, in each period, two channels produce a changeless switching state, such as PWM3 and PWM4, and PWM7 and PWM8. Two zero vectors are distributed at the start and end positions of the total PWM waveforms, and two basic vectors (V1 and V2) are concentrated in the middle, symmetrically. The time durations in Fig. 4 are given by:

Therefore, the switching patterns of the proposed PWM scheme I in eight sectors can be derived as in Fig. 9.

Fig. 9.Space-vector PWM based symmetric switching pattern I of a two-phase full bridge inverter in eight sectors

In the proposed switching pattern I illustrated in Fig. 9, the arrangement of the PWM patterns in each period is summarized as (V00, V1, V2, V2, V1, V00) with the following properties:

1. Among all four PWM channels, two channels stay constant while the other two channels switch twice every PWM period unless the duty cycle is 0% or 100%; 2. The dead zones are inserted between the complimentary pairs of PWM channels to avoid shoot-through faults; 3. Zero voltage vectors (V00) are inserted at the start and end positions of the PWM pattern in each PWM period. The number of zero vectors is half of the number of basic voltage vectors in each PWM period.

To verify the proposed SVPWM scheme I, the experimental results for all of the switching patterns in each of the eight sectors are illustrated in Figs. 10 and Fig. 11.

Fig. 10.The experimental results of the PWM signals of four switches S1, S3, S5, and S7 for the proposed SVPWM scheme I after 50 ms (Horizontal axis: 5ms/div; Vertical axis: 1) PWM1: 5V/div, 2) PWM3: 5V/div, 3) PWM5: 5V/div, 4) PWM7: 5V/div).

Fig. 11.The experimental results of the PWM signals of four switches S1, S3, S5, and S7 for the proposed SVPWM scheme I after 0.2 ms when the reference voltage is located in Sector I (from the top to the bottom) (Horizontal axis: 20us/div; Vertical axis: 1) PWM1: 5V/div, 2) PWM3: 5V/div, 3) PWM5: 5V/div, 4) PWM7: 5V/div).

In Fig. 10 and Fig. 11, half of the eight switches are in the switching state during every period. Compared with the normal PWM scheme, the switching losses of the SVPWM scheme I are reduced to half of the normal amount of losses. In every period, four of the eight PWM channels keep a constant output, which is identical with the previous principle analysis.

3.2 Proposed PWM scheme II

Another PWM scheme is proposed to synthesize the reference voltage vector with reduced switching losses, which differs from PWM scheme I. The time duration, TB, is fixed to a constant zero, which keeps one of the PWM channels constant in the cycle. The principle of the proposed PWM scheme II is shown in Fig. 12.

Fig. 12.The switching patterns and duty cycles in Sector I for the proposed SVPWM scheme II

In Fig. 12, four PWM channels generate the PWM waveforms with a symmetric pattern in Sector I using four comparative values (TB, TA, TB+T1, and TA) in the digital signal processor. Only one channel produces a changeless switching state of PWM1 and PWM2 in each cycle. Two zero vectors are inserted at the middle position of all of the PWM waveforms, and two basic vectors (V1 and V2) are distributed symmetrically on both sides. The time durations in Fig. 8 are given as follows:

Above all, the switching patterns of the proposed PWM scheme II in the eight sectors are derived as in Fig. 13.

Fig. 13.Space-vector PWM based symmetric switching pattern II of a two-phase full bridge inverter in eight sectors

In the proposed switching pattern II illustrated in Fig. 13, the PWM arrangement in each period is summarized as (V1, V2, V00, V00, V2, V1) with the following properties:

1. One of four PWM channels stays constant while the others switch twice for every PWM period unless the duty cycle is 0% or 100%; 2. The dead zones are inserted between the complimentary pairs of the PWM channels to avoid shoot-through faults; 3. Zero voltage vectors (V00) are inserted at the middle position of the PWM pattern in each PWM period. The amount of zero vectors is half of the number of basic voltage vectors in each PWM period.

To verify the proposed SVPWM scheme II, the experimental results of all of the switching patterns in each of the eight sectors are illustrated in Figs. 14 and Fig. 15.

Fig. 14.The experimental results of the PWM signals of four switches S1, S3, S5, and S7 for the proposed SVPWM scheme II after 50 ms (Horizontal axis: 5ms/div; Vertical axis: 1) PWM1: 5V/div, 2) PWM3: 5V/div, 3) PWM5: 5V/div, 4) PWM7: 5V/div).

Fig. 15.The experimental results of the PWM signals of four switches S1, S3, S5, and S7 for the proposed SVPWM scheme II after 0.2 ms when the reference voltage is located in Sector I (Horizontal axis: 20 us/div; Vertical axis: 1) PWM1: 5V/div, 2) PWM3: 5V/div, 3) PWM5: 5V/div, 4) PWM7: 5V/div).

In Figs. 14 and Fig. 15, the proposed SVPWM II also achieves lower switching losses, while two of the eight switches keep a constant output for every period. Compared with the normal SVPWM scheme, the proposed SVPWM scheme II has only three-quarter of the normal switching losses.

Therefore, compared with the normal SVPWM scheme and two proposed SVPWM schemes for two-phase PMSM drives, the switching frequency of the inverter is derived as in Table 3.

Table 3.The frequency and the switching number per cycle of the normal SVPWM and two proposed schemes for two-phase PMSM drives

In Table 3, fPWM represents the switching frequency using the normal SVPWM scheme in a two-phase motor drive.

4. Experiment Results

To verify the proposed SVPWM schemes, a hardware drive with a digital signal processor (DSP) was developed to drive a two-phase PMSM, as shown in Fig. 16. The parameters of the PMSM and the DSP controller are listed in Table 4.

Fig. 16.The configuration of a two-phase PMSM drive using the proposed SVPWM schemes

Table 4.The main parameters of the used PMSM in the drive

The related parameters of the drive are given by Table 5.

Table 5.The parameters of the proposed control system in the drive

The block diagram of the designed experimental system is shown in Fig. 16.

As shown in Fig. 16, the system is composed of five parts including a two-phase eight-switch inverter, an Infineon XE164-based DSP controller, a two-phase PMSM, a PC, and an oscilloscope. The main circuits of the two-phase inverter contain eight insulated gate bipolar transistors (IGBTs) and a single-phase bridge rectifier with four diodes fed by an AC power input. The hardware of the DSP controller consists mainly of an Infineon XE164-based DSP chip, signal adjustment circuits, and filter circuits. The motor is supplied by the four ends a, x, b, and y from the inverter, and two hall sensor signals from the motor are input into the DSP controller to calculate the speed and rotor position. Two stator currents, Ia and Ib, are detected by the signal adjustment circuit in the DSP controller. The source code with the SVPWM algorithm in the computer is compiled and downloaded to the DSP to generate eight PWM trigger signals for the eight IGBTs of the inverter through the Controller Area Network (CAN) communication port of the DSP controller. The state variables of the drive, such as the stator currents, speed, rotor position, and torque, etc., can be displayed in an oscilloscope through a filter circuit of the DSP controller.

In Fig. 17, the system for a two-phase PMSM achieves a steady performance. Three responses of rotor position (Theta), two PWM time durations (Ta and Tb) are shown in the figures. During every period of the rotor position, two projections of the reference voltage vector in the two-phase stationary frame are a sinusoidal waveform with a 90° phase shift. In Fig. 18, the PWM generation module produces the time durations of two adjacent vectors of the reference voltage vector with a triangular waveform. As shown in Fig. 2, there are two amplitudes of Vdc and 1.414Vdc among the eight voltage vectors, which causes the difference in the time durations of the two projection vectors.

Fig. 17.The experiment results of the rotor position and two projections of the reference voltage vector in a two phase stationary frame using the normal and proposed PWM schemes (Horizontal axis: 10ms/ div; Vertical axis: 1) Theta: 5V/div, 2) Va: 2V/div, 3) Vb: 2V/div).

Fig. 18.The experiment results of the rotor position, time duration of T1 and T2 in the equations of 1, 2, 3, and 4 using the normal and proposed PWM scheme (Horizontal axis: 10ms/div; Vertical axis: 1) Theta: 5V/div, 2) Ta: 2V/div, 3) Tb: 2V/div).

Fig. 19 shows the steady responses of the PWM1, rotor position (Theta), and two trigger time durations for PWM channels 1 and 2 (CmpA and CmpB), and the error of two time durations (CmpA-CmpB) using the normal SVPWM and two proposed SVPWM schemes. During every period of the rotor position, a different switching pattern among the eight sectors causes the special trigger time waveforms. Subsequently, two windings of the two-phase PMSM in the drive are fed by two H switch bridges, respectively. In the experimental results, two trigger time durations are used to control two legs of one switch bridge and generate two output voltages to two ends of one winding of the PMSM. The error of the two trigger time durations of the two PWM channels is sinusoidal, which denotes that one winding of the PMSM is fed by a synthesized sinusoid voltage of any H bridge. In the proposed SVPWM schemes of Fig. 19(b) and 19(c), the trigger time duration with part of one period constant can effectively decrease the switching losses compared to the normal SVPWM scheme. From the experimental results of the system, SVPWM scheme II achieves a better steady performance than SVPWM scheme I.

Fig. 19.The experiment results of the steady responses of the PWM1, rotor position, two trigger time durations for PWM channels 1 and 2, and the error of the two trigger time using the normal and two proposed PWM schemes (Horizontal axis: 20ms/div; Vertical axis: 1) PWM1: 5V/div, 2) Theta: 5V/div, 3) CmpA: 2V/div, 4) CmpB: 2V/div, 5) CmpA-CmpB: 5V/div).

Fig. 20 shows the dynamic responses of the PWM1, rotor speed (Speed), rotor position (Theta) and phase A current (Ia) using the normal SVPWM and two proposed SVPWM schemes. During the starting operation, the motor is initially at rest, and the speed of the motor gradually increase holding to 800rpm in 0.8 second. Experimental results indicate that the speed, the position and phase current responses quickly to supply voltage change. Two proposed SVPWM schemes both achieve better dynamic performance during the process of starting operation, the same as that of the normal one. It is clear that the PWM waveforms of the proposed two SVPWM schemes can reduce part of switching losses compared with the normal one. The proposed SVPWM schemes are effective for two-phase motor drive.

Fig. 20.The experiment results of the dynamic responses of the PWM1, speed, rotor position, phase A current using the normal and two proposed PWM schemes (Horizontal axis: 1s/div; Vertical axis: 1) PWM1: 5V/div, 2) Speed:2V/div, 3) Theta: 2V/div, 4) Ia: 2V/div).

Fig. 21 shows PWM1, the phase A current (Ia) and its frequency spectrum plot (FFT of Ia) using the normal and proposed PWM schemes. It is shown that the switching frequency (10 kHz and 20 KHz) harmonics also have significant magnitude in addition to the fundamental frequency. The proposed SVPWM scheme I has been proven to produce lower current harmonics than the normal one. Meanwhile, the proposed SVPWM scheme II achieve higher current harmonics that the normal one. The magnitude of the fundamental frequency of the proposed two schemes are lower. From the experimental results of the system, SVPWM scheme II achieves a better steady performance than SVPWM scheme I.

Fig. 21.The experiment results of PWM1, phase A current and its frequency spectrum using the normal and two proposed PWM schemes (Horizontal axis: 20ms/div; Vertical axis: 1) PWM1: 5V/div, 2) Ia:5V/div, 3) FFT of Ia:20dB/div).

4. Conclusion

Two SVPWM schemes of a vector control based two-phase PMSM drive with a two-phase eight-switch inverter are investigated in the paper. In the normal SVPWM of a two-phase motor drive, the PWM waveforms used to trigger the switches have to be changed twice in each PWM period, which causes a higher PWM frequency and big noise in the drive. Based on the normal SVPWM scheme, two new SVPWM techniques are proposed by the rearrangements of four comparative values to produce new PWM patterns, which can be used to reduce the switching frequency. The principles of the normal and proposed SVPWM schemes are analyzed to show their differences in detail. The experimental results demonstrate that two proposed PWM methods are effective at achieving a low switching loss.