DOI QR코드

DOI QR Code

Garbage Collection Method using Proxy Block considering Index Data Structure based on Flash Memory

플래시 메모리 기반 인덱스 구조에서 대리블록 이용한 가비지 컬렉션 기법

  • Kim, Seon Hwan (Department of Computer Engineering, Yeungnam University) ;
  • Kwak, Jong Wook (Department of Computer Engineering, Yeungnam University)
  • 김선환 (영남대학교 컴퓨터공학과) ;
  • 곽종욱 (영남대학교 컴퓨터공학과)
  • Received : 2015.03.04
  • Accepted : 2015.06.08
  • Published : 2015.06.30

Abstract

Recently, NAND flash memories are used for storage devices because of fast access speed and low-power. However, applications of FTL on low power computing devices lead to heavy workloads which result in a memory requirement and an implementation overhead. Consequently, studies of B+-Tree on embedded devices without the FTL have been proposed. The studies of B+-Tree are optimized for performance of inserting and updating records, considering to disadvantages of the NAND flash memory that it can not support in-place update. However, if a general garbage collection method is applied to the previous studies of B+-Tree, a performance of the B+-Tree is reduced, because it generates a rearrangement of the B+-Tree by changing of page positions on the NAND flash memory. Therefor, we propose a novel garbage collection method which can apply to the B+-Tree based on the NAND flash memory without the FTL. The proposed garbage collection method does not generate a rearrangement of the B+-Tree by using a block information table and a proxy block. We implemented the B+-Tree and ${\mu}$-Tree with the proposed garbage collection on physical devices with the NAND flash memory. In experiment results, the proposed garbage collection scheme compared to greedy algorithm garbage collection scheme increased the number of inserted keys by up to about 73% on B+-Tree and decreased elapsed time of garbage collection by up to about 39% on ${\mu}$-Tree.

낸드 플래시 메모리는 빠른 접근 시간과 저전력의 특성을 가지고 있어 저장장치로 많이 사용되고 있는 추세이다. 하지만 저사양의 임베디드 장치에서는 메모리 요구사항과 구현상의 복잡성으로 FTL을 적용하기에는 비용이 많이 든다. 이러한 이유로 FTL을 구현하기 힘든 임베디드 장치에 적용할 수 있는 B+ 트리 연구들이 다수 제안되었다. 이런 연구들은 낸드 플래시 메모리에서 제자리 업데이트가 불가하다는 단점을 고려하여 삽입과 갱신의 성능을 최적화 하였다. 하지만 B+ 트리에 기존의 가비지 컬렉션 기법들을 적용하면 낸드 플래시 메모리의 페이지 위치를 변경하게 되고 B+ 트리의 재구성을 발생시켜 전체적인 성능을 저하시킨다. 이러한 문제를 해결하고자 본 논문에서는 낸드 플래시 메모리를 기반으로 하는 B+ 트리와 이와 유사한 인덱스 트리 구조에 적용할 수 있는 가비지 컬렉션 기법을 제안한다. 제안하는 가비지 컬렉션 기법은 블록 정보 테이블과 대리 블록을 이용하여 B+ 트리의 재구성을 발생시키지 않는다. 제안된 기법의 성능평가를 위해, 낸드 플래시 메모리가 장착된 실험 장치에 B+ 트리와 ${\mu}$-Tree를 구현하고 제안된 기법을 적용하였다. 구현 결과 B+ 트리에서 제안된 기법이 GAGC(Greedy Algorithm Garbage Collection)보다 삽입된 키의 개수가 약 73% 많았으며, ${\mu}$-Tree에서 제안된 기법이 GAGC보다 시간 오버헤드가 약39% 적었다.

Keywords

References

  1. Kwon, Se Jin, et al. "FTL algorithms for NAND-type flash memories." Design Automation for Embedded Systems, Vol. 15. No. 3-4, pp. 191-224, Dec. 2011. https://doi.org/10.1007/s10617-011-9071-9
  2. 'Ma, Dongzhe, Jianhua Feng, and Guoliang Li. "A survey of address translation technologies for flash memories." ACMComputing Surveys (CSUR), Vol. 46, No. 3, pp. 1-39, Jan. 2014.
  3. Fang, H., et al. "An Adaptive Endurance-Aware $B^+$ -Tree for Flash Memory Storage Systems." Computers, IEEE Transactions, Vol. 63, No. 11, pp. 2661-2673, Nov. 2014. https://doi.org/10.1109/TC.2013.158
  4. Kang, Dongwon, et al. "${\mu}$-Tree: an ordered index structure for NAND flash memory." Proceedings of the 7th ACM&IEEE international conference on Embedded software. ACM, pp. 144-153, Sep. 2007.
  5. Ahn, Jung-Sang, et al. "${\mu}^*$-Tree: An Ordered Index Structure for NAND FlashMemory with Adaptive Page Layout Scheme." Computers, IEEE Transactions, Vol. 62, No. 4, pp. 784-797, Apr. 2013. https://doi.org/10.1109/TC.2012.20
  6. Na, Gap-Joo, Bongki Moon, and Sang-Won Lee. "In-page logging $B^+$-tree for flash memory." Database Systems for Advanced Applications. Springer BerlinHeidelberg, pp. 755-758, Apr. 2009.
  7. Na, Gap-Joo, Sang-Won Lee, and Bongki Moon. "Dynamic in-page logging for flash-aware $B^+$-tree index." Proceedings of the 18th ACM conference on Information and knowledge management. ACM, pp. 1485-1488, Nov. 2009.
  8. Lee, Sungjin, and Jihong Kim. "Improving Performance and Capacity of Flash Storage Devices by Exploiting Heterogeneity of MLC Flash Memory." Computers, IEEE Transactions, Vol. 63, No. 10, pp. 2445-2458, Oct. 2014. https://doi.org/10.1109/TC.2013.120
  9. H.-W. Fang, M.-Y. Yeh, and T.-W. Kuo, "MLC-Flash-Friendly logging and recovery for databases." in Proc.ACM Symp. Appl. Comput. (SAC), pp. 1541-1546, Mar. 2013.
  10. Li, Xiang, Zhou Da, and Xiaofeng Meng. "A new dynamic hash index for flash-based storage." WAIM'08. The Ninth International Conference on. IEEE, pp. 93-98, Jul. 2008.
  11. Chang, Yuan-Hao, Jen-Wei Hsieh, and Tei-Wei Kuo. "Improving flash wear-leveling by proactively moving static data." Computers, IEEE Transactions, Vol. 59, No. 1, pp. 53-65, Jan. 2010. https://doi.org/10.1109/TC.2009.134
  12. Chung, Ching-Che, Duo Sheng, and Ning-Mi Hsueh. "A high-performance wear-leveling algorithm for flash memory system." IEICE Electronics Express, Vol. 9, No. 24, pp. 1874-1880, Dec. 2012. https://doi.org/10.1587/elex.9.1874
  13. Hardware spec, http://docs.cubieboard.org/tutorials/cubietruck/start.
  14. Product Feature, H27UCG8T2ATR-BC Series 64Gb(8192M $\times$ 8bit) Legacy MLC NAND flash.
  15. Wu, Michael, and Willy Zwaenepoel. "eNVy: a non-volatile, main memory storage system." ACM SigPlan Notices. ACM, Vol. 29, No. 11, pp. 86-97, Nov. 1994. https://doi.org/10.1145/195470.195506