The Transactions of the Korean Institute of Power Electronics (전력전자학회논문지)

The Korean Institute of Power Electronics (전력전자학회)
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Circulating Current Reduction Method Using High Frequency Voltage Compensation in Asynchronous Carriers for Modular Scalable Inverter System

Modular Scalable Inverter System에서 캐리어 비동기시 고주파 전압 보상을 이용한 순환전류 저감 기법

  • Choi, Seung-Yeon (Dept. of Electrical Engineering, HYPEC-EECS Lab., Hanyang University) ;
  • Kang, Shin-Won (Dept. of Electrical Engineering, HYPEC-EECS Lab., Hanyang University) ;
  • Im, Jun-Hyuk (Dept. of Electrical Engineering, HYPEC-EECS Lab., Hanyang University) ;
  • Kim, Rae-Young (Dept. of Electrical Bio-Engineering, Hanyang University)
  • Received : 2018.09.17
  • Accepted : 2018.11.17
  • Published : 2019.04.20
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Abstract

This study proposes a circulating current reduction method that uses high-frequency voltage compensation when carrier phase difference occurs between two inverters in MSIS. In MSIS, inverters are configured in parallel to increase power capacity and to increase efficiency by using inverters only as needed. However, in the parallel inverter structure, circulating current is inevitably generated. Circulating current increases the stress on the switch, adversely affects the current control performance, and renders load sharing difficult. The proposed method compensates for the output voltage reference of the slave module by using the high-frequency voltage so that the switching pattern of each module is matched even in asynchronous carriers. The validity of the proposed method is verified by simulations and experiments with 600 W IPMSM.

Keywords

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Fig. 1. Topology of MSIS.

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Fig. 2. A-phase circulating current loop.

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Fig. 3. Analysis of current in parallel inverters.

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Fig. 4. Switching frequency circulating current caused by carrier asynchronous.

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Fig. 5. Control block diagram.

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Fig. 6. Voltage compensation at carrier asynchronous.

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Fig. 7. Process of circulating current reduction.

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Fig. 8. Waveforms without voltage compensation.

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Fig. 9. Waveforms with voltage compensation.

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Fig. 10. Current waveforms with full load.

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Fig. 11. Voltage reference and circulating current waveforms with full load.

TABLE I PARAMETER OF MSIS

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References

  1. J. W. Dixon and B. T. Ooi, "Series and parallel operation of hysteresis current-controlled PWM rectifiers," IEEE Trans. Ind. Applicat., Vol. 25, pp. 644-651, Jul./Aug. 1989. https://doi.org/10.1109/28.31241
  2. D. Shin, J. P. Lee, D. W. Yoo, and H. J. Kim, “Stability improvement of interleaved voltage source inverters employing coupled inductors for grid-connected applications,” IEEE Trans. Ind. Electron., Vol. 62, No. 10, pp. 6014-6023, Oct. 2015. https://doi.org/10.1109/TIE.2015.2420044
  3. K. Shukla, M. Varun, and R. Maheshwari, "A novel carrier-based hybrid PWM technique for minimization of line current ripple in two parallel interleaved two-level VSIs," IEEE Trans. Ind. Electron., Vol. 65, pp. 1908-1918, Aug. 2017. https://doi.org/10.1109/tie.2017.2745438
  4. S. Ogasawara, J. Takagaki, and H. Akagi, "A novel control scheme of a parallel current-controlled PWM inverter," IEEE Trans. Ind. Applicat., Vol. 28, pp. 1023-1027, Sep./Oct. 1992. https://doi.org/10.1109/28.158825
  5. T. P. Chen, “Dual-modulator compensation technique for parallel inverters using space-vector modulation,” IEEE Trans. Ind. Electron., Vol. 56, No. 8, pp. 3004-3012, Aug. 2009. https://doi.org/10.1109/TIE.2009.2022515
  6. F. Wang, Y. Wang, Q. Gao, C. M. Wang, and Y. B. Liu, “A control strategy for suppressing circulating currents in parallel-connected PMSM drives with individual DC links,” IEEE Trans. Power Electron., Vol. 31, No. 2, pp. 1680-1691, Feb. 2016. https://doi.org/10.1109/TPEL.2015.2422791
  7. Z. Ye, D. Boroyevich, J. Y. Choi, and F. C. Lee, “Control of circulating current in two parallel three-phase boost rectifiers,” IEEE Trans. Power Electron., Vol. 17, No. 5, pp. 609-615, Sep. 2002.
  8. Y. Zheng, Z. Wang, and J. Zhang, "Research of harmonics and circulating current suppression in paralleled inverters fed permanent magnet synchronous motor drive system," in Proc. IEEE ICEMS, pp. 1068-1073, 2013.
  9. Z. Xueguang, C. Jiaming, M. Yan, W. Yijie, and X. Dianguo, "Bandwidth expansion method for circulating current control in parallel three-phase PWM converter connection system," IEEE Trans. Power Electron., Vol. 29, No. 12, pp. 6847-6856, Dec. 2014. https://doi.org/10.1109/TPEL.2014.2311046
  10. D. Fingas and P. W. Lehn, "Operation of parallel three-phase converters as a motor drive," in Industrial Electronics 2009. IECON '09. 35th Annual Conference of IEEE, pp. 1217-1222, Nov. 2009.
  11. M. Hua, H. Hu, Y. Xing, Z. He, and Q. Xinxin, “Distributed control for AC-motor-drive-inverters in parallel operation,” IEEE Trans. Ind. Electron., Vol. 58, No. 12, pp. 5361-5370, Dec. 2011. https://doi.org/10.1109/TIE.2011.2112320
  12. L. J. bao and L. Hua, "Study on restraint of circulating current in parallel inverters system with SPWM," in IEEE Confences., pp. 477-480, Dec. 2014.
  13. W. Jiang, Y. Gao, B. Xiao, et al., "Suppression of high-frequency circulating current caused by asynchronous carriers for parallel three-phase grid-connected converters," IEEE Transactions on Industrial Electronics, Vol. 65, pp. 1031-1040, 2018. https://doi.org/10.1109/TIE.2017.2726985
  14. B. Shi and G. Venkataramanan, "Parallel operation of voltage source inverters with minimal intermodule reactors," in Proc. 2004 IEEE IAS Conf, pp. 156-162. 2004.