I. INTRODUCTION

Power electronic devices have been widely utilized with the rapid development of power electronics technology. Therefore, much harmonic current is injected into grids, thus deteriorating power quality and severely damaging the power system further [1]. As a result, harmonic control is a hot issue and has been studied extensively [2]. Active power filters (APFs) can detect and compensate system harmonics and reactive power in real time, thereby reducing the harmonic effect on the grid and ensuring operations [3]. APF exhibits a dynamic response, real-time characteristic, and controllability that are superior to those of the passive filter. Thus, APF is an ideal device with which to compensate harmonics and improve power quality [4].

DC-link voltage must be sufficiently constant in value so that APF can function properly. This process ensures that the compensating current produced by APF strictly follows the control requirement and generates the desired compensation effect [5]. Therefore, the design of DC-link voltage controllers is important; it requires detailed quantitative analysis and specification. Studies have been conducted on the APF control algorithm and on DC-link voltage control strategy [6]-[11]. Nonetheless, few studies investigate APF DC-link voltage control specifically. Existing literature mainly focuses on DC-link capacitor minimization [12], [13], DC-link voltage control strategy [14], [15], minimum DC-link voltage design [16]-[18], and adaptive strategies for DC-link voltage reference value [19]-[22]. Such studies seldom emphasize the inherent relationship between DC-link voltage controllers and the steady-state compensation performance of APF. Furthermore, the design procedures for the DC-link voltage controller are not considered and analyzed, including dynamic and steady-state performance. Given the limitations in literature, the current study investigates the inherent influence of the DC-link voltage controller not only on DC-link voltage control but also on the steady-state compensation performance of APF. The design procedures for the DC-link voltage controller are discussed as well.

A nonlinear, proportional—integral (PI) DC-link voltage controller with variable parameters is proposed to overcome the shortcoming of the conventional fixed-parameter PI DC-link voltage controller. The proposed controller satisfies both the dynamic characteristic of DC-link voltage control and the steady-state compensation performance of APF. DC-link voltage is determined by the P/PI voltage controller in the majority of previous studies. The PI controller is generally applied [6]-[17], and the controller parameters are fixed. P/PI DC-link voltage control is thus improved. A fast-acting DC-link voltage controller that is based on the energy of the DC-link capacitor was proposed in [23]. Overshoot and settling time are reduced for DC-link voltage when the load changes suddenly. A new strategy was presented in [24] to control the square of the DC-link voltage, rather than the DC-link voltage itself. DC-link voltage command was fast-tracked with zero steady-state error. Appropriate parameters were determined through mathematical derivation and design experience for the proposed controllers that can reduce settling time and can avoid overshoot and saturation in line currents. The precision and reliability of the controller parameters were uncertain due to modeling error and to the uncertain and varied system parameters. Moreover, the proposed controllers were still fixed-parameter PI controllers; thus, their values could not be adjusted adaptively according to varying system parameters and control requirements in different control stages.

In the current study, a nonlinear PI controller is proposed and applied to the APF DC-link voltage controller to overcome the shortcoming of conventional fixed-parameter DC-link voltage control. The parameters of the PI controller vary according to the difference between the actual and the reference DC-link voltages. Unlike in the conventional fixed-parameter PI controller, the parameters in the proposed controller are adjusted adaptively on the basis of the difference between the actual and the reference DC-link voltages. The control requirements in different control stages are adopted to satisfy both the dynamic characteristic of DC-link voltage control and the steady-state compensation performance of APF. These requirements include start-up, load fluctuation, and APF steady-state operation period.

The rest of the paper is organized as follows: a three-phase, four-wire, center-split shunt APF is illustrated in Section II. The influence of the DC-link voltage controller on DC-link voltage control and APF compensation performance is analyzed in Section III through control strategy analysis and mathematical deduction. The design procedures for the DC-link voltage controller are considered and analyzed as well in this section. A nonlinear DC-link voltage controller with variable parameters is described in Section IV to overcome the shortcoming of the conventional fixed-parameter DC-link voltage controller and to satisfy the dynamic characteristic of DC-link voltage control and steady-state compensation performance. The simulation and experimental verifications of the analysis of DC-link voltage control, as well as of the proposed voltage controller, are presented in Sections V and VI, respectively. Finally, the conclusions are provided in Section VII.

II. THREE-PHASE FOUR-WIRE CENTER-SPLIT SHUNT APF

The circuit of the three-phase, four-wire, center-split shunt APF is shown in Fig. 1. Usx is the grid voltage, and Ucx is the inverter voltage. isx, ilx, and icx are the grid, load, and compensating currents for each phase, respectively. Subscript x denotes phases a, b, c, and n. Cdc and Udc denote the DC-link capacitor and the DC-link voltages, respectively. The upper and lower DC-link capacitor voltages are UdcU = UdcL = 0.5 Udc. Ls is the grid inductor and is normally neglected due to its low value. The nonlinear load is composed of a three-phase, full-bridge rectifier and a resistance RL that acts as a harmonic-producing load. The LCL filter that consists of LC, LG, and CF is used to filter out the harmonics at switching frequencies. Rd is used to suppress the resonance peak of this filter at resonance frequency and to maintain system stability. Given that the LCL filter behaves as an inductor at the frequency range below 2.5 kHz and that the common requirement of the APF output current involves the 50th harmonic, only the frequency range below 2.5 kHz should be considered in control system design. As a result, the LCL filter can be reasonably simplified as an inductor in a low-frequency range. The inductance value of this inductor is determined by L = LC + LG. R is the equivalent resistance of the inductor [25].

Fig. 1.Circuit of the three-phase, four-wire, center-split shunt APF.

III. ANALYSIS OF DC-LINK VOLTAGE CONTROL

With the aid of the harmonic detection algorithm based on instantaneous reactive power theory, DC-link voltage can be effectively controlled by feedback from the DC-link-voltage-regulated signal as a positive, fundamental, active current component of this algorithm. The difference between the reference and the actual DC-link voltages is regulated by the voltage controller, and the post-regulation signal is added to the aforementioned current component. Therefore, the reference currents contain the fundamental, active current component that ensures energy exchange between the DC and AC links of APF and maintains DC-link voltage at a reference level. The id–iq harmonic detection method based on instantaneous reactive power theory is typically applied to detect load harmonics accurately. The harmonic detection module with DC-link voltage control is presented in Fig. 2, where Tabc-dq0 is the transformation matrix from the abc coordinate to the dq0 coordinate; Tdq0-abc is the transformation matrix from the dq0 coordinate to the abc coordinate; Udc is the actual DC-link voltage; Udc* is the reference DC-link voltage; and ΔId is the signal regulated by DC-link voltage. iLa, iLb, and iLc are load currents. ica*, icb*, icc* and icd*, icq*, ic0* are reference compensation currents in the abc and dq0 coordinates, respectively.

Fig. 2.Harmonic detection module with DC-link voltage control.

A. Influence of DC-link Voltage Controllers on DC-Link Voltage Control

In the majority of existing studies, DC-link voltage is effectively controlled by the P/PI voltage controller. The PI controller is generally used [6]-[17] to feed back the controlled signal as an active current component or a reactive current component, thus maintaining DC-link voltage at a sufficient reference level.

The influence of the DC-link controller on DC-link voltage control is determined in conditions wherein the PI controller is applied. When Ki is fixed at Ki = 50, the effect of different Kp values on step response is shown in Fig. 3. When Ki is fixed, a large Kp value results in short rise and settling times, as well as a small overshoot. When Kp is fixed at Kp = 5, the effect of different Ki values on step response is depicted in Fig. 4. When Kp is fixed, a large Ki value yields a short rise time, but a large overshoot and a long settling time for DC-link voltage.

Fig. 3.Step response simulation for the PI controller when Ki = 50 and when Kp varies from 5 to 25.

Fig. 4.Step response simulation for the PI controller when Kp = 5 and when Ki varies from 5 to 25.

The effect of Kp on step response when the P controller is employed is displayed in Fig. 5. When Kp value varies from 5 to 25, a large Kp yields a short rise time for DC-link voltage. Overshoot does not occur when the P controller is used. However, this controller generates more steady-state errors than the PI controller does.

Fig. 5.Step response simulation for the P controller when Kp varies from 5 to 25.

If the steady-state error in DC-link voltage is considered, then the PI controller is preferred. However, overshoot occurs when this controller is used. Moreover, the PI controller may protect APF from over-voltage and over-current situations. This process poses risks to devices such as insulated-gate bipolar transistors. Although overshoot can be suppressed by increasing Kp, this adjustment may enhance steady-state error. As a result, the voltage control loop exceeds the stability range. A large Ki value also yields a short rise time but a large overshoot for DC-link voltage. Furthermore, Ki appears to be a contradictory parameter for measuring performance. The analysis and design processes for control systems are more complex for the PI controller than for the P controller. The overshoot problem can also be solved by considering the critical damping of DC-link voltage control. When this critical damping is applied, the phase margin of the DC-link voltage control system is small and system stability worsens. Moreover, system parameters vary during operation. Thus, the critical damping of the DC-link voltage control cannot be set accurately. This scenario poses a risk to DC-link voltage control. Therefore, the P controller is preferable for the DC-link voltage controller in APF even though the P controller generates steady-state error. The P controller is advantageous because it does not induce overshoot in the process of increasing DC-link voltage. In the process, the system is protected. Moreover, this controller is simple and saves memory resources in the digital signal processor.

B. Influence of DC-Link Voltage Controllers on APF Steady-State Compensation Performance

APF can produce the compensation currents to adhere strictly to the reference currents that are equal to the load harmonic component. The harmonic component is compensated to avoid harmonic pollution in the power grid. APF compensation performance is mainly determined by two factors: whether or not the reference currents are equal to the load harmonic currents and whether or not the compensation currents track the reference currents effectively. Numerous studies verify that the harmonic detection module determines the accuracy of reference currents with respect to the load harmonic component. Furthermore, the performance of the compensation current controller determines the capability of compensation currents to follow the reference currents. The influence of DC-link voltage controllers on APF compensation performance is analyzed on this basis.

As per the harmonic detection algorithm for DC-link voltage control (presented in Fig. 2), the final reference currents icd*, icq*, and ic0* in the dq0 coordinate are composed of two parts: the original reference current ic* that is equal to the load harmonic component and the DC-link voltage control signal ΔId that is incorporated into the active current component of the reference current. Therefore, these final reference currents can be written as follows:

According to Eq. (1), the final reference currents ica*, icb*, and icc* in the abc coordinate can be obtained as follows:

where Tdq0-abc is the matrix of transformation from the dq0 coordinate to the abc coordinate:

By integrating Eq. (1) into Eq. (2), the final reference currents in the abc coordinate can be written as follows:

As per Eqs. (1) and (4), the final reference currents in both the abc and dq0 coordinates are divided into two parts: the detected harmonic currents and the DC-link voltage control signal. Assuming that the harmonic detection module constructed with the id–iq method can detect the harmonic currents accurately, the first part of the final reference currents represents the specific harmonic currents that must be compensated. However, the other part of the final reference currents, that is, DC-link voltage control, may influence the accuracy of the final reference currents. Consequently, APF compensation performance is affected as well.

The DC-link voltage control signal in Eq. (4) can be expressed as follows:

According to Eq. (5), the nth (n > 0, n = 1,2,3,…) component of the DC-link voltage control signal ΔId in the dq0 coordinate reduces the (n-1)th component and increases the value of the (n+1)th component in the abc coordinate. This scenario is observed in all abc phases. As per Eqs. (1) and (5), the feedback DC-link control signal changes the values of the final reference currents and limits their accuracy in both the abc and dq0 coordinates.

Given that the P controller is preferred and is selected for DC-link voltage control in line with the previously described analysis results, the value of DC-link voltage control signal ΔId can be obtained as follows:

Given Eq. (6), ΔId increases as controller parameter Kp increases under a constant voltage difference ΔUdc and vice versa. APF output compensation currents are controlled and adhere strictly to the final reference currents. A large Kp enhances the deviation of the value of the final reference currents from that of actual harmonic currents. Thus, the APF output compensation currents that follow the final reference currents deviate further from the actual harmonic currents and should be compensated. In this case, the steady-state compensation performance of APF deteriorates further.

IV. PROPOSED NONLINEAR DC-LINK VOLTAGE CONTROLLER WITH VARIABLE PARAMETERS

A. Proposed Nonlinear PI Voltage Controller

According to the analysis results described above, the dynamic performance of DC-link voltage control is improved with the increase in the values of voltage controller parameters. However, this increase also deteriorates APF steady-state compensation performance and vice versa. Therefore, a nonlinear DC-link voltage controller is proposed to satisfy both the dynamic characteristic of DC-link voltage control and steady-state compensation performance. The parameter in the proposed controller is first set to a small fixed value (i.e., less than 0.1). Then, this parameter is multiplied by the absolute value of the voltage difference, which represents the real-time value of the controller parameter. The proposed law of nonlinear DC-link voltage control can be expressed as follows:

Thus, controller parameter values vary according to the difference between the actual and the reference DC-link voltages in real time. Specifically, the parameter values in the proposed controller increase when the actual and the reference DC-link voltages differ significantly, such as in the start-up stage and in the load fluctuation period. This scenario ensures the satisfaction of the dynamic characteristic in DC-link voltage control. By contrast, the parameter values in the proposed controller decrease when the difference between the actual and the reference DC-link voltage is slight, such as in the APF steady operation period. This occurrence prevents the voltage control signal from affecting the accuracy of harmonic detection and steady-state compensation performance.

The P controller is preferred and is selected for DC-link voltage control on the basis of the discussion in Section III regarding the characteristics of PI and P controllers in this voltage control. The law of nonlinear DC-link voltage control proposed in this paper is rewritten as follows:

B. Limitation of the Proposed Controller Parameter Value

The stability of the DC-link voltage control loop should be maintained to avoid the overflow problem. Thus, a limiter is applied to the controller parameter. According to the instantaneous energy balance principle highlighted in Fig. 1, the instantaneous power in the DC-link is equal to that in the AC-link. If the ripple effect is ignored, then the following instantaneous power balance equation can be obtained:

where Udc(t) is the instantaneous DC-link voltage; Idc(t) is the instantaneous DC-link current; and icx is the compensation current. L is the inductance value of the simplified LCL filter in low-frequency range, and R is the equivalent resistance of the inductor, as discussed in Section II. The grid inductor Ls is normally neglected; hence, Usx represents the voltage at the point where APF accesses the entire system. This voltage is equal to the grid voltage.

The influence of grid voltage fluctuation on DC-link voltage can be eliminated by applying the feed-forward control strategy proposed in [26]. Thus, the following derivations based on the balanced, three-phase grid voltage system simplify calculation and deduction to establish the DC-link voltage control loop. The equations below can be established according to instantaneous power theory [26]:

where US is the effective value of the grid voltage; IP(t) is the instantaneous value of the active compensation current; Idc(t) is the instantaneous value of the DC-link current; and C is the capacitance value in the DC-link.

The compensation current ic(t) is composed of fundamental current ip(t) and harmonic compensate current ih(t). ip(t) maintains the DC-link voltage and ih(t) compensates the load harmonics.

Then, the three-phase instantaneous power consumed by inductance and its equivalent resistance can be expressed as follows:

By integrating Eqs. (10), (11), (13), and (14) into Eq. (9), the following equations can be obtained:

Changes in the fundamental current can cause fluctuations in DC-link voltage. Therefore, a transformation is initiated with a slight disturbance at the equilibrium point. Given a slight disturbance, the following can be obtained:

where Udc is the reference value for DC-link voltage.

By integrating Eq. (16) into Eq. (15), the quadratic term is ignored and linearization is performed near the equilibrium point. The following equations can then be derived:

When Eq. (18) is integrated into Eq. (17), the latter is transformed as follows:

When Laplace transform is applied to Eq. (19), the transfer function of the DC-link voltage control loop can be derived:

Then, the control block diagram for DC-link voltage can be constructed as shown in Fig. 6. The closed-loop transfer function of DC-link voltage control can be obtained as follows by integrating the transfer function of the voltage controller into the loop:

Fig. 6.Closed-loop block diagram for DC-link voltage control.

Given the closed-loop transfer function, the controller parameter value can be limited by applying the Routh criterion as follows:

V. SIMULATION AND EXPERIMENTAL VERIFICATION OF VOLTAGE CONTROLLER INFLUENCE

Simulations and experiments on the three-phase, four-wire shunt APF are conducted to verify the deduction and the proposed controller. The simulations are performed in MATLAB. To validate the simulation results, a prototype of this APF is also generated in laboratory. The parameters of the simulated and the experimental systems are listed in Table I. In addition, the P controller is used in DC-link voltage control, and the PI-repetitive compound control algorithm is utilized in compensation current control [27]. The influence of the DC-link voltage controller on DC-link voltage control and APF steady-state compensation performance is verified in this section.

TABLE ISYSTEM PARAMETERS

Fig. 7 shows the simulation results in the start-up stage and during load change when voltage controller Kp varies from 1 to 2.5, 5, 7.5, and 10. The rise and resume times of DC-link voltage shorten with the increase in Kp. Similar results are also obtained in the experiments. The rise time for DC-link voltage in the start-up stage and the resume time in the load change period are shorter when Kp = 10 than when Kp = 1. The experiment results in the start-up stage and in load change are displayed in Figs. 8 and 9, respectively. A large Kp improves the dynamic characteristic in DC-link voltage control.

Fig. 7.Simulation results of DC-link voltage with different Kp values. (a) Start-up stage. (b) Load change.

Fig. 8.Experimental results for DC-link voltage in the start-up stage with different Kp values. (a) Kp = 1, (b) Kp = 10.

Fig. 9.Experimental results for DC-link voltage when load changes under different Kp values. (a) Kp = 1, (b) Kp = 10.

The influence of the DC-link voltage controller on steady-state compensation performance is determined. Without APF, the load currents contain numerous harmonics. The total harmonic distortion (THD) values of the simulated and the experimental load currents are 23.78% and 25.13%, respectively. Therefore, the currents are severely distorted. The value of each harmonic order current is listed in Table II. In general, even-ordered harmonics are largely offset in the three-phase system. Thus, these harmonics can be ignored in the calculation process. Given that the load harmonic currents beyond the 30th order are small, only the harmonic orders within the 30th are considered in this study for simplicity.

TABLE IIHARMONIC CURRENTS

When the value of the voltage controller parameter is Kp = 1, the simulated and the experimental THD values of the source current after compensation are 3.26% and 4.45%, respectively. The simulation and experiment waveforms are exhibited in Fig. 10. When Kp increases to 2.5, 5, 7.5, and 10, the simulated THD values of the source current after compensation increase to 3.48%, 3.80%, 4.26%, and 4.73%, respectively. The corresponding experimental values are 4.85%, 5.32%, 5.86%, and 6.22%. The diagram of variations in THD with Kp is shown in Fig. 11. When the current controller is set, the THD of the source current after compensation increases with Kp. Therefore, changes in Kp affect steady-state compensation performance.

Fig. 10.Waveforms generated when Kp = 1. (a) Simulation. (b) Experiment.

Fig. 11.THD values of the source current after compensation when KP varies.

Assuming that the three phases of the APF are balanced using the id–iq harmonic detection algorithm, Table III lists the simulated value of each reference current order in the abc coordinate. The value in each reference current order is equal to the value in each load harmonic order when the DC-link voltage control signal is disregarded. The simulation results show that the harmonic detection algorithm is effective and that the reference current is the specific harmonic that should be compensated when the DC-link voltage control signal is disregarded.

TABLE IIISIMULATION REFERENCE CURRENTS IN THE ABC COORDINATES

Tables IV and V list the values of each reference current order in the dq0 and abc coordinates with different voltage controller parameters once the DC-link voltage control signal is incorporated into the harmonic detection algorithm as the active component. Table IV shows that the values in the d-axis are mainly in the 6kth order (k = 1,2,3,…) and that the id value varies after integrating the DC-link voltage control signal. The accuracy of the final reference currents in the dq0 coordinate is thus affected. Table V indicates that a fundamental current is used to maintain the DC-link voltage in the final reference current and that the values of each reference current order change. The 6kth order values in the d-axis of the dq0 coordinate affect the values in the abc coordinate. Specifically, these 6kth order values reduce the values of the (6k-1)th order and increase the values of (6k+1)th order in the abc coordinate. The magnitude of variation increases with the increase in Kp. In this case, the final reference current deviates from the accurate harmonic current, and the situation is aggravated with the increase in Kp.

TABLE IVREFERENCE CURRENTS IN DQ0 COORDINATES WITH VARIED VOLTAGE CONTROLLER PARAMETERS

TABLE VFINAL REFERENCE CURRENTS IN ABC COORDINATES WITH VARIED VOLTAGE CONTROLLER PARAMETERS

As per the compensation current presented in Table VI, the APF output compensation currents effectively follow the final reference currents, regardless of the variation in Kp value.

TABLE VICOMPENSATION CURRENTS GIVEN A VOLTAGE CONTROLLER WITH VARYING PARAMETERS

Hence, changes in controller parameter value does not affect current controller performance. Rather, these changes affect the accuracy of the final reference current with respect to the load harmonic. Thus, changes in controller parameter affect the steady-state compensation performance of APF.

Thus, the influence of the DC-link voltage controller can be confirmed as indicated by the aforementioned simulation and experiment results. A large Kp value improves the dynamic characteristic in DC-link voltage control. However, this large value also increases ΔId value, which was added to the harmonic detection algorithm as an active component. As a result, an additional value is incorporated into the final reference currents in both dq0 and abc coordinates. Therefore, the final reference currents deviate from the accurate harmonic currents and limit the precision of the final reference current. Although tracking capability remains excellent due to the set current controller, the steady-state compensation performance of APF may worsen with the increase in Kp.

VI. SIMULATION AND EXPERIMENTAL VERIFICATION OF THE PROPOSED DC-LINK VOLTAGE CONTROLLER

According to the aforementioned analysis and experiment results, an increase in Kp improves the dynamic performance of DC-link voltage control but deteriorates the steady-state compensation performance of APF. By contrast, a decrease in Kp value generates an excellent steady-state compensation performance but does not satisfy the dynamic characteristic of DC-link voltage control. A DC-link voltage controller with variable parameters is proposed to satisfy both the dynamic characteristic of DC-link voltage control and steady-state compensation performance. In the proposed controller, the P parameter varies according to the difference between the actual and the reference DC-link voltages.

Parameter value increases with the voltage difference once the DC-link voltage controller with variable parameters is applied and when the discrepancy between the actual and the reference DC-link voltages is large in the start-up stage. Moreover, the rise time of the DC-link voltage is shorter than that of the conventional fixed-parameter voltage controller with small parameters. Figs. 12 and 13 depict the simulation and experiment results for the process of DC-link voltage increase to the preset reference value given the conventional fixed PI controller and the proposed controller, respectively.

Fig. 12.Simulation results for the process of DC-link voltage increase. (a) With the conventional fixed PI controller. (b) With the proposed voltage controller.

Fig. 13.Experimental results for the process of DC-link voltage increase. (a) With the conventional fixed PI controller. (b) With the proposed voltage controller.

Parameter value also increases with the difference in voltages when the load changes suddenly. Furthermore, the resume time of the DC-link voltage is shorter than that of the conventional fixed-parameter voltage controller with small parameters. Figs. 14 and 15 show the simulation and experimental results for the process of resuming DC-link voltage with the conventional fixed PI controller and the proposed controller when load changes. The voltage controller with variable parameters improves the dynamic characteristic in DC-link voltage control.

Fig. 14.Simulation results for the process of resuming DC-link voltage. (a) With the conventional fixed PI controller. (b) With the proposed voltage controller.

Fig. 15.Experimental results for the process of resuming DC-link voltage. (a) With the conventional fixed PI controller. (b) With the proposed voltage controller.

When the actual DC-link voltage differs only slightly from the reference DC-link voltage in the steady running stage, parameter value is small. Given the load change situation presented in Figs. 14(b) and 15(b), the simulated THD values of the source current are 3.44% and 3.33% before and after load change, respectively. The corresponding experimental values are 4.45% and 4.37%. APF not only improves the dynamic characteristic in the DC-link voltage control when the DC-link voltage controller with variable parameters is employed, but this filter also maintains excellent steady-state compensation performance. Therefore, the dynamic characteristic of DC-link voltage control and APF steady-state compensation performance are both satisfied when the nonlinear DC-link voltage controller with variable parameters is utilized.

VII. CONCLUSION

An adaptive DC-link voltage controller in a three-phase four-wire shunt APF is proposed in this paper. To implement this controller, the required minimum DC-link voltage for APF is reduced. Moreover, a design block is constructed for this minimum DC-link voltage. The simulation and experiment results prove that once the DC-link voltage exceeds the minimum value, increasing DC-link voltage alone does not strengthen compensation effect significantly. However, this increase enhances power consumption and switch loss. Thus, the DC-link voltage reference is initially set to the required minimum value. Power consumption and switch loss can be reduced effectively if APF operates normally. Then, a block is built for adaptive reference DC-link voltage control given different harmonic currents and grid voltage levels. This block can adjust the reference value of DC-link voltage adaptively when the harmonic current and the grid voltage level fluctuate. Thus, this block guarantees the operation of APF and maintains ideal compensation performance. This block also reduces power consumption and switch loss in comparison with traditional fixed DC-link voltage control. Simulation and experimental results verify the viability and effectiveness of the required deduction in minimum DC-link voltage and the proposed adaptive DC-link voltage controller in the three-phase, four-wire shunt APF. Therefore, the proposed adaptive DC-link voltage controller is an optimal solution for practical situations.