The Journal of the Korea institute of electronic communication sciences (한국전자통신학회논문지)

Korea Institute of Electronic Communication Science (한국전자통신학회)
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A Low Power Voltage Controlled Oscillator with Bandwidth Extension Scheme

대역폭 증가 기법을 사용한 저전력 전압 제어 발진기

  • 이원영 (서울과학기술대학교 전자IT미디어공학과) ;
  • 이계민 (서울과학기술대학교 전자IT미디어공학과)
  • Received : 2021.01.22
  • Accepted : 2021.02.17
  • Published : 2021.02.28
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Abstract

This paper introduces a low-power voltage-controlled oscillator(VCO) with filters that consist of resistors and capacitors. The proposed VCO contains a 5-stage current mode buffer, and each buffer cell has a resistor-capacitor filter that connects input and output terminals. The filter adds a zero to the buffer cell. Because the zero moves the oscillation condition to high frequencies, the proposed VCO can generate a high frequency clock with low power consumption. The proposed circuit has been designed with 0.18 ㎛ CMOS process. The power consumption is 9.83 mW at 2.7 GHz. The proposed VCO shows 3.64 pJ/Hz in our simulation study, whereas the conventional circuit shows 4.79 pJ/Hz, indicating that our VCO achieves 24% reduction in power consumption.

본 논문은 저항과 캐패시터로 구성된 필터를 사용한 저전력 전압 제어 발진기를 소개하고 있다. 제안하는 전압 제어 발진기는 5단의 전류모드 버퍼로 구성되어 있으며, 각 버퍼 셀마다 저항-캐패시터 필터가 입력단과 출력단 사이에 연결되어 있다. 필터는 버퍼 셀 회로에 영점을 추가하게 되며, 영점은 회로 발진 조건을 고주파 대역으로 이동시킴으로써 낮은 전력 소모에도 높은 출력 주파수를 낼 수 있게 한다. 제안하는 회로는 0.18 ㎛ CMOS 공정으로 설계되었다. 소모 전력은 2.7 GHz 에서 9.83 mW를 소모한다. 기존 회로와 전력 효율을 비교했을 때, 기존 회로는 4.79 pJ/Hz이고 제안하는 회로는 3.64 pJ/Hz로 기존 회로 대비 전력 소모량을 24 % 감소시켰다.

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